
Jarrett J. Stark
Examiner (ID: 14467, Phone: (571)272-6005 , Office: P/2823 )
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2898, 2823, 2822 |
| Total Applications | 1751 |
| Issued Applications | 1172 |
| Pending Applications | 156 |
| Abandoned Applications | 451 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16000847
[patent_doc_number] => 20200176294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-04
[patent_title] => WAFER TRANSPORT SYSTEM AND METHOD FOR TRANSPORTING WAFERS
[patent_app_type] => utility
[patent_app_number] => 16/683998
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8465
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683998
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/683998 | Wafer transport system and method for transporting wafers | Nov 13, 2019 | Issued |
Array
(
[id] => 16765732
[patent_doc_number] => 20210111314
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => LED WHITE LIGHT DEVICE AND BACKLIGHT MODULE
[patent_app_type] => utility
[patent_app_number] => 16/618810
[patent_app_country] => US
[patent_app_date] => 2019-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3779
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16618810
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/618810 | LED WHITE LIGHT DEVICE AND BACKLIGHT MODULE | Nov 11, 2019 | Abandoned |
Array
(
[id] => 15873301
[patent_doc_number] => 20200144054
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => METHOD AND APPARATUS FOR PROCESSING SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 16/673267
[patent_app_country] => US
[patent_app_date] => 2019-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4690
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16673267
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/673267 | Method and apparatus for processing substrate | Nov 3, 2019 | Issued |
Array
(
[id] => 15874265
[patent_doc_number] => 20200144536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/672953
[patent_app_country] => US
[patent_app_date] => 2019-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11632
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672953
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/672953 | Display device and method of fabricating the same | Nov 3, 2019 | Issued |
Array
(
[id] => 17048177
[patent_doc_number] => 11101367
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-24
[patent_title] => Contact-first field-effect transistors
[patent_app_type] => utility
[patent_app_number] => 16/670894
[patent_app_country] => US
[patent_app_date] => 2019-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3917
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670894
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/670894 | Contact-first field-effect transistors | Oct 30, 2019 | Issued |
Array
(
[id] => 18505422
[patent_doc_number] => 11703229
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Temperature adjustment apparatus for high temperature oven
[patent_app_type] => utility
[patent_app_number] => 16/666359
[patent_app_country] => US
[patent_app_date] => 2019-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4888
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 299
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666359
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/666359 | Temperature adjustment apparatus for high temperature oven | Oct 27, 2019 | Issued |
Array
(
[id] => 15808189
[patent_doc_number] => 20200127237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-23
[patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/657188
[patent_app_country] => US
[patent_app_date] => 2019-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8252
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657188
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/657188 | Display device and manufacturing method thereof | Oct 17, 2019 | Issued |
Array
(
[id] => 17262636
[patent_doc_number] => 20210375621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => METHOD AND DEVICE FOR DEPOSITING A NANO-OBJECT
[patent_app_type] => utility
[patent_app_number] => 17/285369
[patent_app_country] => US
[patent_app_date] => 2019-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8355
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17285369
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/285369 | Method and device for depositing a nano-object | Oct 17, 2019 | Issued |
Array
(
[id] => 16781846
[patent_doc_number] => 20210118925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => VERTICAL GATE STRUCTURE AND LAYOUT IN A CMOS IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 16/655017
[patent_app_country] => US
[patent_app_date] => 2019-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7022
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655017
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/655017 | Vertical gate structure and layout in a CMOS image sensor | Oct 15, 2019 | Issued |
Array
(
[id] => 16751002
[patent_doc_number] => 20210103011
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-08
[patent_title] => MAGNETIC PROPERTY MEASURING SYSTEMS, METHODS OF MEASURING MAGNETIC PROPERTY, AND METHODS OF FABRICATING MAGNETIC MEMORY DEVICES USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/592086
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10020
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592086
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592086 | Magnetic property measuring systems, methods of measuring magnetic property, and methods of fabricating magnetic memory devices using the same | Oct 2, 2019 | Issued |
Array
(
[id] => 17730728
[patent_doc_number] => 11387129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Substrate warehouse, substrate processing system, and substrate inspection method
[patent_app_type] => utility
[patent_app_number] => 16/586137
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6210
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586137
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/586137 | Substrate warehouse, substrate processing system, and substrate inspection method | Sep 26, 2019 | Issued |
Array
(
[id] => 15443023
[patent_doc_number] => 20200035695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-30
[patent_title] => SEAL METHOD TO INTEGRATE NON-VOLATILE MEMORY (NVM) INTO LOGIC OR BIPOLAR CMOS DMOS (BCD) TECHNOLOGY
[patent_app_type] => utility
[patent_app_number] => 16/586481
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15286
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586481
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/586481 | Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology | Sep 26, 2019 | Issued |
Array
(
[id] => 16697249
[patent_doc_number] => 10947833
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Diagnostics of downhole dynamometer data for control and troubleshooting of reciprocating rod lift systems
[patent_app_type] => utility
[patent_app_number] => 16/584465
[patent_app_country] => US
[patent_app_date] => 2019-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 39
[patent_no_of_words] => 12826
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584465
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/584465 | Diagnostics of downhole dynamometer data for control and troubleshooting of reciprocating rod lift systems | Sep 25, 2019 | Issued |
Array
(
[id] => 15351927
[patent_doc_number] => 20200013855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => RADIO FREQUENCY SWITCHES WITH AIR GAP STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 16/575675
[patent_app_country] => US
[patent_app_date] => 2019-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4402
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575675
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/575675 | Radio frequency switches with air gap structures | Sep 18, 2019 | Issued |
Array
(
[id] => 18120841
[patent_doc_number] => 11552240
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-10
[patent_title] => Machines and processes for producing polymer films and films produced thereby
[patent_app_type] => utility
[patent_app_number] => 16/571794
[patent_app_country] => US
[patent_app_date] => 2019-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 37
[patent_no_of_words] => 6732
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571794
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/571794 | Machines and processes for producing polymer films and films produced thereby | Sep 15, 2019 | Issued |
Array
(
[id] => 16715582
[patent_doc_number] => 20210082729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => METHOD AND APPARATUS FOR SUBSTRATE ALIGNMENT
[patent_app_type] => utility
[patent_app_number] => 16/570453
[patent_app_country] => US
[patent_app_date] => 2019-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22384
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -34
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570453
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/570453 | Method and apparatus for substrate alignment | Sep 12, 2019 | Issued |
Array
(
[id] => 16715621
[patent_doc_number] => 20210082768
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => Semiconductor Device and Method
[patent_app_type] => utility
[patent_app_number] => 16/568518
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11275
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568518
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568518 | Semiconductor device and method | Sep 11, 2019 | Issued |
Array
(
[id] => 17196077
[patent_doc_number] => 11164844
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Double etch stop layer to protect semiconductor device layers from wet chemical etch
[patent_app_type] => utility
[patent_app_number] => 16/568605
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 6398
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568605
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568605 | Double etch stop layer to protect semiconductor device layers from wet chemical etch | Sep 11, 2019 | Issued |
Array
(
[id] => 16715726
[patent_doc_number] => 20210082873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => BACKSIDE CONTACT FOR THERMAL DISPLACEMENT IN A MULTI-WAFER STACKED INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/568623
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7850
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568623
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568623 | Backside contact for thermal displacement in a multi-wafer stacked integrated circuit | Sep 11, 2019 | Issued |
Array
(
[id] => 17424371
[patent_doc_number] => 11257833
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-22
[patent_title] => Memory device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/568297
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4215
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 345
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568297
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568297 | Memory device and manufacturing method thereof | Sep 11, 2019 | Issued |