Search

Jarrett J. Stark

Examiner (ID: 14467, Phone: (571)272-6005 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2898, 2823, 2822
Total Applications
1751
Issued Applications
1172
Pending Applications
156
Abandoned Applications
451

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16715948 [patent_doc_number] => 20210083095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => EXTENDED-DRAIN FIELD-EFFECT TRANSISTORS INCLUDING A FLOATING GATE [patent_app_type] => utility [patent_app_number] => 16/568591 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568591 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568591
Extended-drain field-effect transistors including a floating gate Sep 11, 2019 Issued
Array ( [id] => 17092827 [patent_doc_number] => 11121025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Layer for side wall passivation [patent_app_type] => utility [patent_app_number] => 16/568622 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568622 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568622
Layer for side wall passivation Sep 11, 2019 Issued
Array ( [id] => 16021297 [patent_doc_number] => 20200185492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/568490 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568490 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568490
Semiconductor device Sep 11, 2019 Issued
Array ( [id] => 16332661 [patent_doc_number] => 20200303627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MAGNETIC MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/568050 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568050
Magnetic memory device and manufacturing method of the same Sep 10, 2019 Issued
Array ( [id] => 17152719 [patent_doc_number] => 11145810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/567663 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567663 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567663
Memory device Sep 10, 2019 Issued
Array ( [id] => 16987772 [patent_doc_number] => 11074951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Magnetic memory device [patent_app_type] => utility [patent_app_number] => 16/568102 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3570 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568102 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568102
Magnetic memory device Sep 10, 2019 Issued
Array ( [id] => 16692424 [patent_doc_number] => 20210074903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => COMBINED DOLAN BRIDGE AND QUANTUM DOT JOSEPHSON JUNCTION IN SERIES [patent_app_type] => utility [patent_app_number] => 16/567748 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567748 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567748
Combined dolan bridge and quantum dot josephson junction in series Sep 10, 2019 Issued
Array ( [id] => 17439017 [patent_doc_number] => 11264358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => ASIC package with photonics and vertical power delivery [patent_app_type] => utility [patent_app_number] => 16/567766 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4307 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567766
ASIC package with photonics and vertical power delivery Sep 10, 2019 Issued
Array ( [id] => 16272316 [patent_doc_number] => 20200273804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR DEVICES HAVING CONDUCTIVE PILLARS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/567790 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567790
SEMICONDUCTOR DEVICES HAVING CONDUCTIVE PILLARS AND METHODS OF MANUFACTURING THE SAME Sep 10, 2019 Abandoned
Array ( [id] => 16332282 [patent_doc_number] => 20200303248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => CIRCUIT WAFER AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/567641 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567641 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567641
CIRCUIT WAFER AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Sep 10, 2019 Abandoned
Array ( [id] => 15300119 [patent_doc_number] => 20190393195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => Device and Method for UBM/RDL Routing [patent_app_type] => utility [patent_app_number] => 16/562990 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562990
Device and method for UBM/RDL routing Sep 5, 2019 Issued
Array ( [id] => 15332071 [patent_doc_number] => 20200006365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SEAL METHOD TO INTEGRATE NON-VOLATILE MEMORY (NVM) INTO LOGIC OR BIPOLAR CMOS DMOS (BCD) TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 16/560028 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560028 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560028
Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology Sep 3, 2019 Issued
Array ( [id] => 15597595 [patent_doc_number] => 20200075332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => Methods Of Forming Silicon-Containing Layers [patent_app_type] => utility [patent_app_number] => 16/558719 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558719 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558719
Methods Of Forming Silicon-Containing Layers Sep 2, 2019 Abandoned
Array ( [id] => 17210691 [patent_doc_number] => 11171068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method of manufacturing semiconductor device, semiconductor device, and power conversion device [patent_app_type] => utility [patent_app_number] => 16/558389 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558389
Method of manufacturing semiconductor device, semiconductor device, and power conversion device Sep 2, 2019 Issued
Array ( [id] => 17210691 [patent_doc_number] => 11171068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method of manufacturing semiconductor device, semiconductor device, and power conversion device [patent_app_type] => utility [patent_app_number] => 16/558389 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558389
Method of manufacturing semiconductor device, semiconductor device, and power conversion device Sep 2, 2019 Issued
Array ( [id] => 17210691 [patent_doc_number] => 11171068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method of manufacturing semiconductor device, semiconductor device, and power conversion device [patent_app_type] => utility [patent_app_number] => 16/558389 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558389
Method of manufacturing semiconductor device, semiconductor device, and power conversion device Sep 2, 2019 Issued
Array ( [id] => 17210691 [patent_doc_number] => 11171068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method of manufacturing semiconductor device, semiconductor device, and power conversion device [patent_app_type] => utility [patent_app_number] => 16/558389 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558389
Method of manufacturing semiconductor device, semiconductor device, and power conversion device Sep 2, 2019 Issued
Array ( [id] => 17855601 [patent_doc_number] => 20220285644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/637249 [patent_app_country] => US [patent_app_date] => 2019-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637249 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/637249
Light-emitting element and display device Sep 1, 2019 Issued
Array ( [id] => 15591809 [patent_doc_number] => 20200072439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => LENS, LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE LENS AND THE LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/556240 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556240
Lens, light emitting device and method of manufacturing the lens and the light emitting device Aug 29, 2019 Issued
Array ( [id] => 16818340 [patent_doc_number] => 11003164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Methods for aligning a physical layer to a pattern formed via multi-patterning, and associated systems [patent_app_type] => utility [patent_app_number] => 16/556927 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9502 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556927 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556927
Methods for aligning a physical layer to a pattern formed via multi-patterning, and associated systems Aug 29, 2019 Issued
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