Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6820102 [patent_doc_number] => 20030218263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Electronic component with a semiconductor chip, method of producing an electronic component and a panel with a plurality of electronic components' [patent_app_type] => new [patent_app_number] => 10/396841 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6873 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218263.pdf [firstpage_image] =>[orig_patent_app_number] => 10396841 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396841
Electronic component with a semiconductor chip, method of producing an electronic component and a panel with a plurality of electronic components Mar 24, 2003 Issued
Array ( [id] => 7626555 [patent_doc_number] => 06768207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Multichip wafer-level package and method for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 10/392851 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4027 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768207.pdf [firstpage_image] =>[orig_patent_app_number] => 10392851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392851
Multichip wafer-level package and method for manufacturing the same Mar 20, 2003 Issued
Array ( [id] => 7421267 [patent_doc_number] => 20040183184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'COMPOSITE CAPACITOR AND STIFFENER FOR CHIP CARRIER' [patent_app_type] => new [patent_app_number] => 10/392615 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183184.pdf [firstpage_image] =>[orig_patent_app_number] => 10392615 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392615
Composite capacitor and stiffener for chip carrier Mar 19, 2003 Issued
Array ( [id] => 1159809 [patent_doc_number] => 06762495 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Area array package with non-electrically connected solder balls' [patent_app_type] => B1 [patent_app_number] => 10/393666 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2375 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762495.pdf [firstpage_image] =>[orig_patent_app_number] => 10393666 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393666
Area array package with non-electrically connected solder balls Mar 19, 2003 Issued
Array ( [id] => 6827654 [patent_doc_number] => 20030178712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/392212 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3959 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20030178712.pdf [firstpage_image] =>[orig_patent_app_number] => 10392212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392212
Semiconductor device and method for producing the same Mar 18, 2003 Issued
Array ( [id] => 7612389 [patent_doc_number] => 06903448 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'High performance leadframe in electronic package' [patent_app_type] => utility [patent_app_number] => 10/392436 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3683 [patent_no_of_claims] => 90 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903448.pdf [firstpage_image] =>[orig_patent_app_number] => 10392436 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392436
High performance leadframe in electronic package Mar 16, 2003 Issued
Array ( [id] => 6794790 [patent_doc_number] => 20030173663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/389121 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10733 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20030173663.pdf [firstpage_image] =>[orig_patent_app_number] => 10389121 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389121
Semiconductor device Mar 13, 2003 Issued
Array ( [id] => 1125308 [patent_doc_number] => 06794740 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Leadframe package for semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 10/387801 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6563 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794740.pdf [firstpage_image] =>[orig_patent_app_number] => 10387801 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387801
Leadframe package for semiconductor devices Mar 12, 2003 Issued
Array ( [id] => 1232466 [patent_doc_number] => 06693357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Methods and semiconductor devices with wiring layer fill structures to improve planarization uniformity' [patent_app_type] => B1 [patent_app_number] => 10/388042 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 8776 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693357.pdf [firstpage_image] =>[orig_patent_app_number] => 10388042 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388042
Methods and semiconductor devices with wiring layer fill structures to improve planarization uniformity Mar 12, 2003 Issued
Array ( [id] => 6845383 [patent_doc_number] => 20030164550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'Apparatus for package reduction in stacked chip and board assemblies' [patent_app_type] => new [patent_app_number] => 10/387036 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164550.pdf [firstpage_image] =>[orig_patent_app_number] => 10387036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387036
Apparatus for package reduction in stacked chip and board assemblies Mar 11, 2003 Issued
Array ( [id] => 6727737 [patent_doc_number] => 20030183927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Microwave integrated circuit' [patent_app_type] => new [patent_app_number] => 10/385525 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4199 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183927.pdf [firstpage_image] =>[orig_patent_app_number] => 10385525 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385525
Microwave integrated circuit Mar 11, 2003 Issued
Array ( [id] => 6794811 [patent_doc_number] => 20030173684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Wafer-level coated copper stud bumps' [patent_app_type] => new [patent_app_number] => 10/386621 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3133 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20030173684.pdf [firstpage_image] =>[orig_patent_app_number] => 10386621 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/386621
Wafer-level coated copper stud bumps Mar 10, 2003 Issued
Array ( [id] => 1025447 [patent_doc_number] => 06885033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Light emitting devices for light conversion and methods and semiconductor chips for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/385034 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6954 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885033.pdf [firstpage_image] =>[orig_patent_app_number] => 10385034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385034
Light emitting devices for light conversion and methods and semiconductor chips for fabricating the same Mar 9, 2003 Issued
Array ( [id] => 1232477 [patent_doc_number] => 06693360 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'Static type semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 10/383051 [patent_app_country] => US [patent_app_date] => 2003-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 7763 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693360.pdf [firstpage_image] =>[orig_patent_app_number] => 10383051 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383051
Static type semiconductor memory device Mar 6, 2003 Issued
Array ( [id] => 7144047 [patent_doc_number] => 20040169275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Area-array device assembly with pre-applied underfill layers on printed wiring board' [patent_app_type] => new [patent_app_number] => 10/376405 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10869 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20040169275.pdf [firstpage_image] =>[orig_patent_app_number] => 10376405 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376405
Area-array device assembly with pre-applied underfill layers on printed wiring board Feb 26, 2003 Issued
Array ( [id] => 7296548 [patent_doc_number] => 20040214419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Semiconductor device and method for manufacturing same' [patent_app_type] => new [patent_app_number] => 10/374521 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5021 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20040214419.pdf [firstpage_image] =>[orig_patent_app_number] => 10374521 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374521
Semiconductor device and method for manufacturing same Feb 26, 2003 Issued
Array ( [id] => 7371937 [patent_doc_number] => 20040080031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Window-type ball grid array semiconductor package with lead frame as chip carrier and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/377545 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080031.pdf [firstpage_image] =>[orig_patent_app_number] => 10377545 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377545
Window-type ball grid array semiconductor package with lead frame as chip carrier and method for fabricating the same Feb 26, 2003 Issued
Array ( [id] => 1069260 [patent_doc_number] => 06844627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Metal film semiconductor device and a method for forming the same' [patent_app_type] => utility [patent_app_number] => 10/367916 [patent_app_country] => US [patent_app_date] => 2003-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4766 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/844/06844627.pdf [firstpage_image] =>[orig_patent_app_number] => 10367916 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/367916
Metal film semiconductor device and a method for forming the same Feb 18, 2003 Issued
Array ( [id] => 1178748 [patent_doc_number] => 06747354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Semiconductor devices having multilevel interconnections and methods for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 10/370222 [patent_app_country] => US [patent_app_date] => 2003-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 2967 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747354.pdf [firstpage_image] =>[orig_patent_app_number] => 10370222 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/370222
Semiconductor devices having multilevel interconnections and methods for manufacturing the same Feb 18, 2003 Issued
Array ( [id] => 975993 [patent_doc_number] => 06933610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby' [patent_app_type] => utility [patent_app_number] => 10/370422 [patent_app_country] => US [patent_app_date] => 2003-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933610.pdf [firstpage_image] =>[orig_patent_app_number] => 10370422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/370422
Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby Feb 18, 2003 Issued
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