
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1128280
[patent_doc_number] => 06791148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-14
[patent_title] => 'Method and composite for decreasing charge leakage'
[patent_app_type] => B2
[patent_app_number] => 10/369786
[patent_app_country] => US
[patent_app_date] => 2003-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3705
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/791/06791148.pdf
[firstpage_image] =>[orig_patent_app_number] => 10369786
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/369786 | Method and composite for decreasing charge leakage | Feb 17, 2003 | Issued |
Array
(
[id] => 6785775
[patent_doc_number] => 20030137014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Semiconductor integrated circuit device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/358276
[patent_app_country] => US
[patent_app_date] => 2003-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 7523
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20030137014.pdf
[firstpage_image] =>[orig_patent_app_number] => 10358276
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/358276 | Semiconductor integrated circuit device and method of manufacturing the same | Feb 4, 2003 | Issued |
Array
(
[id] => 6854161
[patent_doc_number] => 20030127662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-10
[patent_title] => 'Utilization of die active surfaces for laterally extending die internal and external connections'
[patent_app_type] => new
[patent_app_number] => 10/345895
[patent_app_country] => US
[patent_app_date] => 2003-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4052
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20030127662.pdf
[firstpage_image] =>[orig_patent_app_number] => 10345895
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/345895 | Utilization of die active surfaces for laterally extending die internal and external connections | Jan 14, 2003 | Issued |
Array
(
[id] => 6764106
[patent_doc_number] => 20030098504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Semiconductor memory module having double-sided stacked memory chip layout'
[patent_app_type] => new
[patent_app_number] => 10/341397
[patent_app_country] => US
[patent_app_date] => 2003-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 10756
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20030098504.pdf
[firstpage_image] =>[orig_patent_app_number] => 10341397
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/341397 | Semiconductor memory module having double-sided stacked memory chip layout | Jan 13, 2003 | Issued |
Array
(
[id] => 1182276
[patent_doc_number] => 06740973
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-25
[patent_title] => 'Stacked structure for an image sensor'
[patent_app_type] => B1
[patent_app_number] => 10/340361
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1605
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/740/06740973.pdf
[firstpage_image] =>[orig_patent_app_number] => 10340361
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/340361 | Stacked structure for an image sensor | Jan 8, 2003 | Issued |
Array
(
[id] => 6764116
[patent_doc_number] => 20030098514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Packages for semiconductor die'
[patent_app_type] => new
[patent_app_number] => 10/340331
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3522
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20030098514.pdf
[firstpage_image] =>[orig_patent_app_number] => 10340331
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/340331 | Packages for semiconductor die | Jan 8, 2003 | Issued |
Array
(
[id] => 7963805
[patent_doc_number] => 06680525
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Stacked structure of an image sensor'
[patent_app_type] => B1
[patent_app_number] => 10/340251
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1661
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/680/06680525.pdf
[firstpage_image] =>[orig_patent_app_number] => 10340251
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/340251 | Stacked structure of an image sensor | Jan 8, 2003 | Issued |
Array
(
[id] => 7625080
[patent_doc_number] => 06724090
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-20
[patent_title] => 'Multi-chip package and method for manufacturing the same'
[patent_app_type] => B2
[patent_app_number] => 10/338202
[patent_app_country] => US
[patent_app_date] => 2003-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 22
[patent_no_of_words] => 5390
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 13
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/724/06724090.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338202
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338202 | Multi-chip package and method for manufacturing the same | Jan 7, 2003 | Issued |
Array
(
[id] => 1254428
[patent_doc_number] => 06670714
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-30
[patent_title] => 'Semiconductor integrated circuit device having multilevel interconnection'
[patent_app_type] => B1
[patent_app_number] => 10/337402
[patent_app_country] => US
[patent_app_date] => 2003-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 4220
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/670/06670714.pdf
[firstpage_image] =>[orig_patent_app_number] => 10337402
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/337402 | Semiconductor integrated circuit device having multilevel interconnection | Jan 6, 2003 | Issued |
Array
(
[id] => 6801276
[patent_doc_number] => 20030096441
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-22
[patent_title] => 'Fabrication method of thin film transistor substrate for X-ray detector'
[patent_app_type] => new
[patent_app_number] => 10/330126
[patent_app_country] => US
[patent_app_date] => 2002-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3521
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0096/20030096441.pdf
[firstpage_image] =>[orig_patent_app_number] => 10330126
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/330126 | Fabrication method of thin film transistor substrate for X-ray detector | Dec 29, 2002 | Issued |
Array
(
[id] => 7295977
[patent_doc_number] => 20040124525
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'CHIP COOLING'
[patent_app_type] => new
[patent_app_number] => 10/330742
[patent_app_country] => US
[patent_app_date] => 2002-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 5298
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20040124525.pdf
[firstpage_image] =>[orig_patent_app_number] => 10330742
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/330742 | Chip cooling | Dec 26, 2002 | Issued |
Array
(
[id] => 1136615
[patent_doc_number] => 06784529
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-31
[patent_title] => 'Semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 10/329342
[patent_app_country] => US
[patent_app_date] => 2002-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2673
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/784/06784529.pdf
[firstpage_image] =>[orig_patent_app_number] => 10329342
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/329342 | Semiconductor device | Dec 26, 2002 | Issued |
Array
(
[id] => 7457162
[patent_doc_number] => 20040119157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'REMOTE THERMAL VIAS FOR DENSELY PACKED ELECTRICAL ASSEMBLAGE'
[patent_app_type] => new
[patent_app_number] => 10/328332
[patent_app_country] => US
[patent_app_date] => 2002-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3151
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0119/20040119157.pdf
[firstpage_image] =>[orig_patent_app_number] => 10328332
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/328332 | Remote thermal vias for densely packed electrical assemblage | Dec 22, 2002 | Issued |
Array
(
[id] => 1214324
[patent_doc_number] => 06710443
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-23
[patent_title] => 'INTEGRATED CIRCUIT PROVIDING THERMALLY CONDUCTIVE STRUCTURES SUBSTANTIALLY HORIZONTALLY COUPLED TO ONE ANOTHER WITHIN ONE OR MORE HEAT DISSIPATION LAYERS TO DISSIPATE HEAT FROM A HEAT GENERATING STRUCTURE'
[patent_app_type] => B1
[patent_app_number] => 10/326612
[patent_app_country] => US
[patent_app_date] => 2002-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 5793
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/710/06710443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10326612
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/326612 | INTEGRATED CIRCUIT PROVIDING THERMALLY CONDUCTIVE STRUCTURES SUBSTANTIALLY HORIZONTALLY COUPLED TO ONE ANOTHER WITHIN ONE OR MORE HEAT DISSIPATION LAYERS TO DISSIPATE HEAT FROM A HEAT GENERATING STRUCTURE | Dec 19, 2002 | Issued |
Array
(
[id] => 1183300
[patent_doc_number] => 06737755
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-18
[patent_title] => 'Ball grid array package with improved thermal characteristics'
[patent_app_type] => B1
[patent_app_number] => 10/322661
[patent_app_country] => US
[patent_app_date] => 2002-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 2138
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/737/06737755.pdf
[firstpage_image] =>[orig_patent_app_number] => 10322661
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/322661 | Ball grid array package with improved thermal characteristics | Dec 18, 2002 | Issued |
Array
(
[id] => 6858977
[patent_doc_number] => 20030089985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-15
[patent_title] => 'Deflectable interconnect'
[patent_app_type] => new
[patent_app_number] => 10/324626
[patent_app_country] => US
[patent_app_date] => 2002-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6787
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20030089985.pdf
[firstpage_image] =>[orig_patent_app_number] => 10324626
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/324626 | Deflectable interconnect | Dec 17, 2002 | Issued |
Array
(
[id] => 1237287
[patent_doc_number] => 06690086
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-02-10
[patent_title] => 'Apparatus and method for reducing interposer compression during molding process'
[patent_app_type] => B2
[patent_app_number] => 10/318172
[patent_app_country] => US
[patent_app_date] => 2002-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2383
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/690/06690086.pdf
[firstpage_image] =>[orig_patent_app_number] => 10318172
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/318172 | Apparatus and method for reducing interposer compression during molding process | Dec 12, 2002 | Issued |
Array
(
[id] => 7120373
[patent_doc_number] => 20050012202
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-20
[patent_title] => 'Heat sink for semiconductor components or similar devices, method for producing the same and tool for carrying out said method'
[patent_app_type] => utility
[patent_app_number] => 10/487182
[patent_app_country] => US
[patent_app_date] => 2002-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2505
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20050012202.pdf
[firstpage_image] =>[orig_patent_app_number] => 10487182
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/487182 | Heat sink for semiconductor components or similar devices, method for producing the same and tool for carrying out said method | Dec 4, 2002 | Issued |
Array
(
[id] => 1136686
[patent_doc_number] => 06784541
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-31
[patent_title] => 'Semiconductor module and mounting method for same'
[patent_app_type] => B2
[patent_app_number] => 10/302986
[patent_app_country] => US
[patent_app_date] => 2002-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 53
[patent_no_of_words] => 9256
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/784/06784541.pdf
[firstpage_image] =>[orig_patent_app_number] => 10302986
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/302986 | Semiconductor module and mounting method for same | Nov 24, 2002 | Issued |
Array
(
[id] => 6781182
[patent_doc_number] => 20030062629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Flip chip adaptor package for bare die'
[patent_app_type] => new
[patent_app_number] => 10/302594
[patent_app_country] => US
[patent_app_date] => 2002-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2947
[patent_no_of_claims] => 114
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20030062629.pdf
[firstpage_image] =>[orig_patent_app_number] => 10302594
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/302594 | Flip chip adaptor package for bare die | Nov 21, 2002 | Issued |