Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17262846 [patent_doc_number] => 20210375831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/399233 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399233 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399233
Semiconductor package Aug 10, 2021 Issued
Array ( [id] => 18608171 [patent_doc_number] => 11749649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Composite IC chips including a chiplet embedded within metallization layers of a host IC chip [patent_app_type] => utility [patent_app_number] => 17/399185 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399185 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399185
Composite IC chips including a chiplet embedded within metallization layers of a host IC chip Aug 10, 2021 Issued
Array ( [id] => 18759803 [patent_doc_number] => 11810840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/444779 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 7455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444779
Semiconductor device Aug 9, 2021 Issued
Array ( [id] => 17247053 [patent_doc_number] => 20210366798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => PACKAGED STRUCTURE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/396691 [patent_app_country] => US [patent_app_date] => 2021-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/396691
PACKAGED STRUCTURE AND FORMING METHOD THEREOF Aug 6, 2021 Pending
Array ( [id] => 19906518 [patent_doc_number] => 12283537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Electronic package and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/396604 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2090 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/396604
Electronic package and method of forming the same Aug 5, 2021 Issued
Array ( [id] => 18184534 [patent_doc_number] => 20230045264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, DISPLAY PANEL, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/792255 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792255
Display substrate and manufacturing method therefor, display panel, and display device Aug 5, 2021 Issued
Array ( [id] => 17402943 [patent_doc_number] => 20220045034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => DEVICES, SYSTEMS, AND METHODS FOR STACKED DIE PACKAGES [patent_app_type] => utility [patent_app_number] => 17/392995 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392995
Devices, systems, and methods for stacked die packages Aug 2, 2021 Issued
Array ( [id] => 18170032 [patent_doc_number] => 20230036643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => PACKAGES WITH ELECTRICAL FUSES [patent_app_type] => utility [patent_app_number] => 17/390823 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390823
Packages with electrical fuses Jul 29, 2021 Issued
Array ( [id] => 19046748 [patent_doc_number] => 11935868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Semiconductor package including plurality of semiconductor chips and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/384046 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11564 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384046
Semiconductor package including plurality of semiconductor chips and method for manufacturing the same Jul 22, 2021 Issued
Array ( [id] => 17652621 [patent_doc_number] => 11355361 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-07 [patent_title] => Method of measuring underfill profile of underfill cavity having solder bumps [patent_app_type] => utility [patent_app_number] => 17/381515 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6745 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381515
Method of measuring underfill profile of underfill cavity having solder bumps Jul 20, 2021 Issued
Array ( [id] => 18804412 [patent_doc_number] => 11837576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Memory card [patent_app_type] => utility [patent_app_number] => 17/377865 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11699 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377865 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377865
Memory card Jul 15, 2021 Issued
Array ( [id] => 18494264 [patent_doc_number] => 11699685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Non-cure and cure hybrid film-on-die for embedded controller die [patent_app_type] => utility [patent_app_number] => 17/375296 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375296
Non-cure and cure hybrid film-on-die for embedded controller die Jul 13, 2021 Issued
Array ( [id] => 17203556 [patent_doc_number] => 20210343651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/372565 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/372565
Semiconductor package and manufacturing method thereof Jul 11, 2021 Issued
Array ( [id] => 18548253 [patent_doc_number] => 11721613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Power module [patent_app_type] => utility [patent_app_number] => 17/373126 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4437 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373126
Power module Jul 11, 2021 Issued
Array ( [id] => 19063178 [patent_doc_number] => 11942430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Stacked die modules for semiconductor device assemblies and methods of manufacturing stacked die modules [patent_app_type] => utility [patent_app_number] => 17/373452 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373452
Stacked die modules for semiconductor device assemblies and methods of manufacturing stacked die modules Jul 11, 2021 Issued
Array ( [id] => 18735736 [patent_doc_number] => 11804477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Semiconductor device having package on package structure and method of manufacturing the semiconductor device [patent_app_type] => utility [patent_app_number] => 17/371834 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 29 [patent_no_of_words] => 13726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371834
Semiconductor device having package on package structure and method of manufacturing the semiconductor device Jul 8, 2021 Issued
Array ( [id] => 18008443 [patent_doc_number] => 20220367210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Info Packages Including Thermal Dissipation Blocks [patent_app_type] => utility [patent_app_number] => 17/371673 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371673
Info packages including thermal dissipation blocks Jul 8, 2021 Issued
Array ( [id] => 19330445 [patent_doc_number] => 12048145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Method of manufacturing semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/602937 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5393 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17602937 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/602937
Method of manufacturing semiconductor structure Jul 7, 2021 Issued
Array ( [id] => 18548285 [patent_doc_number] => 11721645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Semiconductor package device and semiconductor process [patent_app_type] => utility [patent_app_number] => 17/368688 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 8037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368688 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368688
Semiconductor package device and semiconductor process Jul 5, 2021 Issued
Array ( [id] => 18999156 [patent_doc_number] => 11916012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Manufacturing method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/361362 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 48 [patent_no_of_words] => 20853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361362 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361362
Manufacturing method of semiconductor structure Jun 28, 2021 Issued
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