Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1288811 [patent_doc_number] => 06639324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Flip chip package module and method of forming the same' [patent_app_type] => B1 [patent_app_number] => 10/253822 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2991 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639324.pdf [firstpage_image] =>[orig_patent_app_number] => 10253822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253822
Flip chip package module and method of forming the same Sep 24, 2002 Issued
Array ( [id] => 1221809 [patent_doc_number] => 06703704 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Stress reducing stiffener ring' [patent_app_type] => B1 [patent_app_number] => 10/254391 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4542 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703704.pdf [firstpage_image] =>[orig_patent_app_number] => 10254391 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/254391
Stress reducing stiffener ring Sep 24, 2002 Issued
Array ( [id] => 1225191 [patent_doc_number] => 06700196 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Programmable multi-chip module' [patent_app_type] => B1 [patent_app_number] => 10/253851 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2533 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700196.pdf [firstpage_image] =>[orig_patent_app_number] => 10253851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253851
Programmable multi-chip module Sep 22, 2002 Issued
Array ( [id] => 1306270 [patent_doc_number] => 06621167 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Metal interconnect structure' [patent_app_type] => B1 [patent_app_number] => 10/064671 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621167.pdf [firstpage_image] =>[orig_patent_app_number] => 10064671 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064671
Metal interconnect structure Sep 22, 2002 Issued
Array ( [id] => 1002709 [patent_doc_number] => 06909166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Leads of a no-lead type package of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/246781 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3210 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909166.pdf [firstpage_image] =>[orig_patent_app_number] => 10246781 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246781
Leads of a no-lead type package of a semiconductor device Sep 17, 2002 Issued
Array ( [id] => 6694932 [patent_doc_number] => 20030107126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'High performance multi-chip flip chip package' [patent_app_type] => new [patent_app_number] => 10/245529 [patent_app_country] => US [patent_app_date] => 2002-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3725 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107126.pdf [firstpage_image] =>[orig_patent_app_number] => 10245529 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245529
High performance multi-chip flip chip package Sep 16, 2002 Abandoned
Array ( [id] => 1203527 [patent_doc_number] => 06720648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Electronic device' [patent_app_type] => B2 [patent_app_number] => 10/230071 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3317 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720648.pdf [firstpage_image] =>[orig_patent_app_number] => 10230071 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230071
Electronic device Aug 28, 2002 Issued
Array ( [id] => 6317150 [patent_doc_number] => 20020195699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Packaged die on PCB with heat sink encapsulant' [patent_app_type] => new [patent_app_number] => 10/232782 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3202 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20020195699.pdf [firstpage_image] =>[orig_patent_app_number] => 10232782 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232782
Packaged die on PCB with heat sink encapsulant Aug 27, 2002 Issued
Array ( [id] => 1128466 [patent_doc_number] => 06791197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Reducing layer separation and cracking in semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 10/227772 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 4392 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791197.pdf [firstpage_image] =>[orig_patent_app_number] => 10227772 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/227772
Reducing layer separation and cracking in semiconductor devices Aug 25, 2002 Issued
Array ( [id] => 1266580 [patent_doc_number] => 06661095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/222791 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 8130 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661095.pdf [firstpage_image] =>[orig_patent_app_number] => 10222791 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/222791
Semiconductor device Aug 18, 2002 Issued
Array ( [id] => 1047421 [patent_doc_number] => 06864581 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Etched metal trace with reduced RF impendance resulting from the skin effect' [patent_app_type] => utility [patent_app_number] => 10/219212 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 3052 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864581.pdf [firstpage_image] =>[orig_patent_app_number] => 10219212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/219212
Etched metal trace with reduced RF impendance resulting from the skin effect Aug 14, 2002 Issued
Array ( [id] => 1221860 [patent_doc_number] => 06703710 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Dual damascene metal trace with reduced RF impedance resulting from the skin effect' [patent_app_type] => B1 [patent_app_number] => 10/219791 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 2983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703710.pdf [firstpage_image] =>[orig_patent_app_number] => 10219791 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/219791
Dual damascene metal trace with reduced RF impedance resulting from the skin effect Aug 14, 2002 Issued
Array ( [id] => 1310293 [patent_doc_number] => 06617690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Interconnect structures containing stress adjustment cap layer' [patent_app_type] => B1 [patent_app_number] => 10/218292 [patent_app_country] => US [patent_app_date] => 2002-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6058 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617690.pdf [firstpage_image] =>[orig_patent_app_number] => 10218292 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/218292
Interconnect structures containing stress adjustment cap layer Aug 13, 2002 Issued
Array ( [id] => 1266612 [patent_doc_number] => 06661106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Alignment mark structure for laser fusing and method of use' [patent_app_type] => B1 [patent_app_number] => 10/218881 [patent_app_country] => US [patent_app_date] => 2002-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3057 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661106.pdf [firstpage_image] =>[orig_patent_app_number] => 10218881 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/218881
Alignment mark structure for laser fusing and method of use Aug 12, 2002 Issued
Array ( [id] => 7963795 [patent_doc_number] => 06680530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Multi-step transmission line for multilayer packaging' [patent_app_type] => B1 [patent_app_number] => 10/217822 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1633 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680530.pdf [firstpage_image] =>[orig_patent_app_number] => 10217822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217822
Multi-step transmission line for multilayer packaging Aug 11, 2002 Issued
Array ( [id] => 6832786 [patent_doc_number] => 20030160331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Interconnection structure between wires' [patent_app_type] => new [patent_app_number] => 10/214571 [patent_app_country] => US [patent_app_date] => 2002-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7136 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160331.pdf [firstpage_image] =>[orig_patent_app_number] => 10214571 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/214571
Interconnection structure between wires Aug 8, 2002 Abandoned
Array ( [id] => 6494361 [patent_doc_number] => 20020190336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/212104 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9297 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20020190336.pdf [firstpage_image] =>[orig_patent_app_number] => 10212104 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212104
Semiconductor device Aug 5, 2002 Issued
Array ( [id] => 465302 [patent_doc_number] => 07239008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Semiconductor apparatus and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/212171 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 44 [patent_no_of_words] => 9601 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239008.pdf [firstpage_image] =>[orig_patent_app_number] => 10212171 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212171
Semiconductor apparatus and method for fabricating the same Aug 5, 2002 Issued
Array ( [id] => 1225224 [patent_doc_number] => 06700206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Stacked semiconductor package and method producing same' [patent_app_type] => B2 [patent_app_number] => 10/211021 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5103 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700206.pdf [firstpage_image] =>[orig_patent_app_number] => 10211021 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/211021
Stacked semiconductor package and method producing same Aug 1, 2002 Issued
Array ( [id] => 7386739 [patent_doc_number] => 20040021207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Dual gauge lead frame' [patent_app_type] => new [patent_app_number] => 10/209532 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1602 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20040021207.pdf [firstpage_image] =>[orig_patent_app_number] => 10209532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/209532
Dual gauge lead frame Jul 30, 2002 Issued
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