Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4244238 [patent_doc_number] => 06166437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Silicon on silicon package with precision align macro' [patent_app_type] => 1 [patent_app_number] => 9/290921 [patent_app_country] => US [patent_app_date] => 1999-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 1718 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166437.pdf [firstpage_image] =>[orig_patent_app_number] => 290921 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/290921
Silicon on silicon package with precision align macro Apr 11, 1999 Issued
Array ( [id] => 4038537 [patent_doc_number] => 05994782 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Surface treatment equipment for treating circuit boards' [patent_app_type] => 1 [patent_app_number] => 9/288961 [patent_app_country] => US [patent_app_date] => 1999-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1487 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994782.pdf [firstpage_image] =>[orig_patent_app_number] => 288961 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/288961
Surface treatment equipment for treating circuit boards Apr 8, 1999 Issued
Array ( [id] => 6897503 [patent_doc_number] => 20010045668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'PLUG STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/289773 [patent_app_country] => US [patent_app_date] => 1999-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1808 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045668.pdf [firstpage_image] =>[orig_patent_app_number] => 09289773 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/289773
Plug structure Apr 7, 1999 Issued
Array ( [id] => 4137839 [patent_doc_number] => 06147403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Semiconductor body with metallizing on the back side' [patent_app_type] => 1 [patent_app_number] => 9/285902 [patent_app_country] => US [patent_app_date] => 1999-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2179 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147403.pdf [firstpage_image] =>[orig_patent_app_number] => 285902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285902
Semiconductor body with metallizing on the back side Apr 7, 1999 Issued
Array ( [id] => 4095054 [patent_doc_number] => 06133630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Condensed memory matrix' [patent_app_type] => 1 [patent_app_number] => 9/287460 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1934 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133630.pdf [firstpage_image] =>[orig_patent_app_number] => 287460 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/287460
Condensed memory matrix Apr 6, 1999 Issued
Array ( [id] => 4244279 [patent_doc_number] => 06081038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Semiconductor chip package structure' [patent_app_type] => 1 [patent_app_number] => 9/285971 [patent_app_country] => US [patent_app_date] => 1999-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4488 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081038.pdf [firstpage_image] =>[orig_patent_app_number] => 285971 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285971
Semiconductor chip package structure Apr 4, 1999 Issued
Array ( [id] => 4423782 [patent_doc_number] => 06177729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Rolling ball connector' [patent_app_type] => 1 [patent_app_number] => 9/303290 [patent_app_country] => US [patent_app_date] => 1999-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 3285 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177729.pdf [firstpage_image] =>[orig_patent_app_number] => 303290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/303290
Rolling ball connector Apr 2, 1999 Issued
Array ( [id] => 1486839 [patent_doc_number] => 06365978 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Electrical redundancy for improved mechanical reliability in ball grid array packages' [patent_app_type] => B1 [patent_app_number] => 09/287203 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4835 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365978.pdf [firstpage_image] =>[orig_patent_app_number] => 09287203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/287203
Electrical redundancy for improved mechanical reliability in ball grid array packages Apr 1, 1999 Issued
Array ( [id] => 4239301 [patent_doc_number] => 06075281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Modified lead finger for wire bonding' [patent_app_type] => 1 [patent_app_number] => 9/281673 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3741 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075281.pdf [firstpage_image] =>[orig_patent_app_number] => 281673 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/281673
Modified lead finger for wire bonding Mar 29, 1999 Issued
Array ( [id] => 4257835 [patent_doc_number] => 06208027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Temporary interconnect for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/281521 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1963 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208027.pdf [firstpage_image] =>[orig_patent_app_number] => 281521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/281521
Temporary interconnect for semiconductor devices Mar 29, 1999 Issued
Array ( [id] => 1553092 [patent_doc_number] => 06400025 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Highly purified titanium material, method for preparation of it and sputtering target using it' [patent_app_type] => B1 [patent_app_number] => 09/280653 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4804 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400025.pdf [firstpage_image] =>[orig_patent_app_number] => 09280653 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/280653
Highly purified titanium material, method for preparation of it and sputtering target using it Mar 28, 1999 Issued
Array ( [id] => 4243137 [patent_doc_number] => 06144107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Solid state pickup device excellent in heat-resistance and method of manufacturing the device' [patent_app_type] => 1 [patent_app_number] => 9/275822 [patent_app_country] => US [patent_app_date] => 1999-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4436 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144107.pdf [firstpage_image] =>[orig_patent_app_number] => 275822 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/275822
Solid state pickup device excellent in heat-resistance and method of manufacturing the device Mar 24, 1999 Issued
Array ( [id] => 1536545 [patent_doc_number] => 06489678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'High performance multi-chip flip chip package' [patent_app_type] => B1 [patent_app_number] => 09/285191 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489678.pdf [firstpage_image] =>[orig_patent_app_number] => 09285191 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285191
High performance multi-chip flip chip package Mar 14, 1999 Issued
Array ( [id] => 4253790 [patent_doc_number] => 06137185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Electrode structure of a wiring substrate of semiconductor device having expanded pitch' [patent_app_type] => 1 [patent_app_number] => 9/264813 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 6265 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137185.pdf [firstpage_image] =>[orig_patent_app_number] => 264813 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264813
Electrode structure of a wiring substrate of semiconductor device having expanded pitch Mar 8, 1999 Issued
Array ( [id] => 1486849 [patent_doc_number] => 06365979 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/262741 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 5225 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365979.pdf [firstpage_image] =>[orig_patent_app_number] => 09262741 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/262741
Semiconductor device and manufacturing method thereof Mar 4, 1999 Issued
Array ( [id] => 4145532 [patent_doc_number] => 06060771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Connecting lead for semiconductor devices and method for fabricating the lead' [patent_app_type] => 1 [patent_app_number] => 9/259590 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4492 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060771.pdf [firstpage_image] =>[orig_patent_app_number] => 259590 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259590
Connecting lead for semiconductor devices and method for fabricating the lead Feb 28, 1999 Issued
Array ( [id] => 4091839 [patent_doc_number] => 06018196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Semiconductor flip chip package' [patent_app_type] => 1 [patent_app_number] => 9/258521 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 20040 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018196.pdf [firstpage_image] =>[orig_patent_app_number] => 258521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258521
Semiconductor flip chip package Feb 25, 1999 Issued
Array ( [id] => 4362821 [patent_doc_number] => 06175151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument' [patent_app_type] => 1 [patent_app_number] => 9/155062 [patent_app_country] => US [patent_app_date] => 1999-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 45 [patent_no_of_words] => 17868 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175151.pdf [firstpage_image] =>[orig_patent_app_number] => 155062 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/155062
Film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument Feb 17, 1999 Issued
Array ( [id] => 4355720 [patent_doc_number] => 06215184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Optimized circuit design layout for high performance ball grid array packages' [patent_app_type] => 1 [patent_app_number] => 9/250641 [patent_app_country] => US [patent_app_date] => 1999-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1961 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215184.pdf [firstpage_image] =>[orig_patent_app_number] => 250641 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/250641
Optimized circuit design layout for high performance ball grid array packages Feb 15, 1999 Issued
Array ( [id] => 4265198 [patent_doc_number] => 06204562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Wafer-level chip scale package' [patent_app_type] => 1 [patent_app_number] => 9/249583 [patent_app_country] => US [patent_app_date] => 1999-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2092 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204562.pdf [firstpage_image] =>[orig_patent_app_number] => 249583 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249583
Wafer-level chip scale package Feb 10, 1999 Issued
Menu