
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4360952
[patent_doc_number] => 06218727
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Wafer frame'
[patent_app_type] => 1
[patent_app_number] => 9/246745
[patent_app_country] => US
[patent_app_date] => 1999-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1385
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/218/06218727.pdf
[firstpage_image] =>[orig_patent_app_number] => 246745
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/246745 | Wafer frame | Feb 7, 1999 | Issued |
Array
(
[id] => 4363807
[patent_doc_number] => 06169328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-02
[patent_title] => 'Semiconductor chip assembly'
[patent_app_type] => 1
[patent_app_number] => 9/246056
[patent_app_country] => US
[patent_app_date] => 1999-02-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/246056 | Semiconductor chip assembly | Feb 7, 1999 | Issued |
Array
(
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[patent_kind] => NA
[patent_issue_date] => 2000-03-21
[patent_title] => 'Method of improved cavity BGA circuit package'
[patent_app_type] => 1
[patent_app_number] => 9/238872
[patent_app_country] => US
[patent_app_date] => 1999-01-27
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[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/06/040/06040631.pdf
[firstpage_image] =>[orig_patent_app_number] => 238872
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/238872 | Method of improved cavity BGA circuit package | Jan 26, 1999 | Issued |
Array
(
[id] => 4190934
[patent_doc_number] => 06093958
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-25
[patent_title] => 'Lead-on-chip type semiconductor device having thin plate and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/233003
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/093/06093958.pdf
[firstpage_image] =>[orig_patent_app_number] => 233003
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/233003 | Lead-on-chip type semiconductor device having thin plate and method for manufacturing the same | Jan 18, 1999 | Issued |
Array
(
[id] => 1603180
[patent_doc_number] => 06433360
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-13
[patent_title] => 'Structure and method of testing failed or returned die to determine failure location and type'
[patent_app_type] => B1
[patent_app_number] => 09/231733
[patent_app_country] => US
[patent_app_date] => 1999-01-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/231733 | Structure and method of testing failed or returned die to determine failure location and type | Jan 14, 1999 | Issued |
Array
(
[id] => 4366625
[patent_doc_number] => 06255728
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[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Rigid encapsulation package for semiconductor devices'
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[patent_app_number] => 9/232801
[patent_app_country] => US
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[pdf_file] => patents/06/255/06255728.pdf
[firstpage_image] =>[orig_patent_app_number] => 232801
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232801 | Rigid encapsulation package for semiconductor devices | Jan 14, 1999 | Issued |
Array
(
[id] => 4210280
[patent_doc_number] => 06078100
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[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Utilization of die repattern layers for die internal connections'
[patent_app_type] => 1
[patent_app_number] => 9/229373
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[patent_app_date] => 1999-01-13
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[pdf_file] => patents/06/078/06078100.pdf
[firstpage_image] =>[orig_patent_app_number] => 229373
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/229373 | Utilization of die repattern layers for die internal connections | Jan 12, 1999 | Issued |
Array
(
[id] => 4359353
[patent_doc_number] => 06291891
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[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Semiconductor device manufacturing method and semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/228642
[patent_app_country] => US
[patent_app_date] => 1999-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[pdf_file] => patents/06/291/06291891.pdf
[firstpage_image] =>[orig_patent_app_number] => 228642
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/228642 | Semiconductor device manufacturing method and semiconductor device | Jan 11, 1999 | Issued |
Array
(
[id] => 4414599
[patent_doc_number] => 06229216
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Silicon interposer and multi-chip-module (MCM) with through substrate vias'
[patent_app_type] => 1
[patent_app_number] => 9/228323
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[patent_app_date] => 1999-01-11
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[pdf_file] => patents/06/229/06229216.pdf
[firstpage_image] =>[orig_patent_app_number] => 228323
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/228323 | Silicon interposer and multi-chip-module (MCM) with through substrate vias | Jan 10, 1999 | Issued |
Array
(
[id] => 4189634
[patent_doc_number] => 06150712
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Lead frame for semiconductor device, and semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/226123
[patent_app_country] => US
[patent_app_date] => 1999-01-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/150/06150712.pdf
[firstpage_image] =>[orig_patent_app_number] => 226123
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/226123 | Lead frame for semiconductor device, and semiconductor device | Jan 6, 1999 | Issued |
Array
(
[id] => 3944573
[patent_doc_number] => 05973388
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Leadframe, method of manufacturing a leadframe, and method of packaging an electronic component utilizing the leadframe'
[patent_app_type] => 1
[patent_app_number] => 9/224823
[patent_app_country] => US
[patent_app_date] => 1999-01-04
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[pdf_file] => patents/05/973/05973388.pdf
[firstpage_image] =>[orig_patent_app_number] => 224823
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224823 | Leadframe, method of manufacturing a leadframe, and method of packaging an electronic component utilizing the leadframe | Jan 3, 1999 | Issued |
| 09/224592 | CHIP PACKAGE INCLUDING PELTIER COOLING | Dec 30, 1998 | Abandoned |
Array
(
[id] => 4413068
[patent_doc_number] => 06239487
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-29
[patent_title] => 'Lead frame with heat spreader and semiconductor package therewith'
[patent_app_type] => 1
[patent_app_number] => 9/223191
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[firstpage_image] =>[orig_patent_app_number] => 223191
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/223191 | Lead frame with heat spreader and semiconductor package therewith | Dec 29, 1998 | Issued |
Array
(
[id] => 4222596
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[firstpage_image] =>[orig_patent_app_number] => 220772
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Array
(
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Array
(
[id] => 4244180
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[patent_title] => 'Resin molded semiconductor device and method of manufacturing semiconductor package'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/219186 | Windowed non-ceramic package having embedded frame | Dec 20, 1998 | Issued |
Array
(
[id] => 4196729
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/206511 | Tantalum-aluminum-nitrogen material for semiconductor devices | Dec 6, 1998 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/201613 | Reduced size integrated circuits and methods using test pads located in scribe regions of integrated circuits wafers | Nov 29, 1998 | Issued |