Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4239470 [patent_doc_number] => 06118177 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Heatspreader for a flip chip device, and method for connecting the heatspreader' [patent_app_type] => 1 [patent_app_number] => 9/193832 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2420 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/118/06118177.pdf [firstpage_image] =>[orig_patent_app_number] => 193832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193832
Heatspreader for a flip chip device, and method for connecting the heatspreader Nov 16, 1998 Issued
Array ( [id] => 4184549 [patent_doc_number] => 06037668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Integrated circuit having a support structure' [patent_app_type] => 1 [patent_app_number] => 9/191353 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4785 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037668.pdf [firstpage_image] =>[orig_patent_app_number] => 191353 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/191353
Integrated circuit having a support structure Nov 12, 1998 Issued
Array ( [id] => 4310589 [patent_doc_number] => 06252308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Packaged die PCB with heat sink encapsulant' [patent_app_type] => 1 [patent_app_number] => 9/189102 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3101 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252308.pdf [firstpage_image] =>[orig_patent_app_number] => 189102 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/189102
Packaged die PCB with heat sink encapsulant Nov 8, 1998 Issued
Array ( [id] => 4162574 [patent_doc_number] => 06157052 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Semiconductor integrated circuit having three wiring layers' [patent_app_type] => 1 [patent_app_number] => 9/174315 [patent_app_country] => US [patent_app_date] => 1998-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7423 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157052.pdf [firstpage_image] =>[orig_patent_app_number] => 174315 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/174315
Semiconductor integrated circuit having three wiring layers Oct 18, 1998 Issued
Array ( [id] => 4222510 [patent_doc_number] => 06111305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'P-I-N semiconductor photodetector' [patent_app_type] => 1 [patent_app_number] => 9/168653 [patent_app_country] => US [patent_app_date] => 1998-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 6383 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111305.pdf [firstpage_image] =>[orig_patent_app_number] => 168653 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/168653
P-I-N semiconductor photodetector Oct 7, 1998 Issued
Array ( [id] => 4333875 [patent_doc_number] => 06320252 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'PC' [patent_app_type] => 1 [patent_app_number] => 9/155744 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 2512 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320252.pdf [firstpage_image] =>[orig_patent_app_number] => 155744 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/155744
PC Oct 4, 1998 Issued
Array ( [id] => 4222583 [patent_doc_number] => 06111310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Radially-increasing core power bus grid architecture' [patent_app_type] => 1 [patent_app_number] => 9/163683 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3404 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111310.pdf [firstpage_image] =>[orig_patent_app_number] => 163683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/163683
Radially-increasing core power bus grid architecture Sep 29, 1998 Issued
Array ( [id] => 4326249 [patent_doc_number] => 06331735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts' [patent_app_type] => 1 [patent_app_number] => 9/161062 [patent_app_country] => US [patent_app_date] => 1998-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1977 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/331/06331735.pdf [firstpage_image] =>[orig_patent_app_number] => 161062 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/161062
Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts Sep 24, 1998 Issued
Array ( [id] => 4159204 [patent_doc_number] => 06124634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Micromachined chip scale package' [patent_app_type] => 1 [patent_app_number] => 9/156300 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3948 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124634.pdf [firstpage_image] =>[orig_patent_app_number] => 156300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156300
Micromachined chip scale package Sep 16, 1998 Issued
Array ( [id] => 4076170 [patent_doc_number] => 06069404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Arrangement for the reduction of noise in microwave transistors and method for the manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 9/156202 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1610 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069404.pdf [firstpage_image] =>[orig_patent_app_number] => 156202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156202
Arrangement for the reduction of noise in microwave transistors and method for the manufacture thereof Sep 16, 1998 Issued
Array ( [id] => 1459929 [patent_doc_number] => 06426548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same' [patent_app_type] => B1 [patent_app_number] => 09/150693 [patent_app_country] => US [patent_app_date] => 1998-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 56 [patent_no_of_words] => 16965 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426548.pdf [firstpage_image] =>[orig_patent_app_number] => 09150693 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/150693
Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same Sep 9, 1998 Issued
Array ( [id] => 4227392 [patent_doc_number] => 06011277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Gate insulated field effect transistors and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/149290 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 8715 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011277.pdf [firstpage_image] =>[orig_patent_app_number] => 149290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/149290
Gate insulated field effect transistors and method of manufacturing the same Sep 8, 1998 Issued
Array ( [id] => 4282035 [patent_doc_number] => 06281520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Gate insulated field effect transistors and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/149291 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 8697 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281520.pdf [firstpage_image] =>[orig_patent_app_number] => 149291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/149291
Gate insulated field effect transistors and method of manufacturing the same Sep 8, 1998 Issued
Array ( [id] => 4180111 [patent_doc_number] => 06084297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Cavity ball grid array apparatus' [patent_app_type] => 1 [patent_app_number] => 9/146643 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5227 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084297.pdf [firstpage_image] =>[orig_patent_app_number] => 146643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146643
Cavity ball grid array apparatus Sep 2, 1998 Issued
Array ( [id] => 1583061 [patent_doc_number] => 06424034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'High performance packaging for microprocessors and DRAM chips which minimizes timing skews' [patent_app_type] => B1 [patent_app_number] => 09/144197 [patent_app_country] => US [patent_app_date] => 1998-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3144 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424034.pdf [firstpage_image] =>[orig_patent_app_number] => 09144197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/144197
High performance packaging for microprocessors and DRAM chips which minimizes timing skews Aug 30, 1998 Issued
Array ( [id] => 4424827 [patent_doc_number] => 06225694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/141751 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225694.pdf [firstpage_image] =>[orig_patent_app_number] => 141751 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/141751
Semiconductor device Aug 27, 1998 Issued
Array ( [id] => 4101973 [patent_doc_number] => 06097085 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Electronic device and semiconductor package' [patent_app_type] => 1 [patent_app_number] => 9/140541 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5028 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097085.pdf [firstpage_image] =>[orig_patent_app_number] => 140541 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/140541
Electronic device and semiconductor package Aug 25, 1998 Issued
Array ( [id] => 4161433 [patent_doc_number] => 06107677 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die' [patent_app_type] => 1 [patent_app_number] => 9/141003 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5331 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 459 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107677.pdf [firstpage_image] =>[orig_patent_app_number] => 141003 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/141003
Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die Aug 25, 1998 Issued
Array ( [id] => 3954121 [patent_doc_number] => 05977616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die' [patent_app_type] => 1 [patent_app_number] => 9/141002 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5318 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 545 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977616.pdf [firstpage_image] =>[orig_patent_app_number] => 141002 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/141002
Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die Aug 25, 1998 Issued
Array ( [id] => 4094967 [patent_doc_number] => 06133625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/139412 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 43 [patent_no_of_words] => 5174 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133625.pdf [firstpage_image] =>[orig_patent_app_number] => 139412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/139412
Semiconductor device and method for manufacturing the same Aug 24, 1998 Issued
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