
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4239470
[patent_doc_number] => 06118177
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Heatspreader for a flip chip device, and method for connecting the heatspreader'
[patent_app_type] => 1
[patent_app_number] => 9/193832
[patent_app_country] => US
[patent_app_date] => 1998-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2420
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/118/06118177.pdf
[firstpage_image] =>[orig_patent_app_number] => 193832
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/193832 | Heatspreader for a flip chip device, and method for connecting the heatspreader | Nov 16, 1998 | Issued |
Array
(
[id] => 4184549
[patent_doc_number] => 06037668
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Integrated circuit having a support structure'
[patent_app_type] => 1
[patent_app_number] => 9/191353
[patent_app_country] => US
[patent_app_date] => 1998-11-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/037/06037668.pdf
[firstpage_image] =>[orig_patent_app_number] => 191353
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/191353 | Integrated circuit having a support structure | Nov 12, 1998 | Issued |
Array
(
[id] => 4310589
[patent_doc_number] => 06252308
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-26
[patent_title] => 'Packaged die PCB with heat sink encapsulant'
[patent_app_type] => 1
[patent_app_number] => 9/189102
[patent_app_country] => US
[patent_app_date] => 1998-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[firstpage_image] =>[orig_patent_app_number] => 189102
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/189102 | Packaged die PCB with heat sink encapsulant | Nov 8, 1998 | Issued |
Array
(
[id] => 4162574
[patent_doc_number] => 06157052
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-05
[patent_title] => 'Semiconductor integrated circuit having three wiring layers'
[patent_app_type] => 1
[patent_app_number] => 9/174315
[patent_app_country] => US
[patent_app_date] => 1998-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_words] => 7423
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[firstpage_image] =>[orig_patent_app_number] => 174315
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/174315 | Semiconductor integrated circuit having three wiring layers | Oct 18, 1998 | Issued |
Array
(
[id] => 4222510
[patent_doc_number] => 06111305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-29
[patent_title] => 'P-I-N semiconductor photodetector'
[patent_app_type] => 1
[patent_app_number] => 9/168653
[patent_app_country] => US
[patent_app_date] => 1998-10-08
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[firstpage_image] =>[orig_patent_app_number] => 168653
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/168653 | P-I-N semiconductor photodetector | Oct 7, 1998 | Issued |
Array
(
[id] => 4333875
[patent_doc_number] => 06320252
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[patent_kind] => NA
[patent_issue_date] => 2001-11-20
[patent_title] => 'PC'
[patent_app_type] => 1
[patent_app_number] => 9/155744
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[patent_app_date] => 1998-10-05
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[pdf_file] => patents/06/320/06320252.pdf
[firstpage_image] =>[orig_patent_app_number] => 155744
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/155744 | PC | Oct 4, 1998 | Issued |
Array
(
[id] => 4222583
[patent_doc_number] => 06111310
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-29
[patent_title] => 'Radially-increasing core power bus grid architecture'
[patent_app_type] => 1
[patent_app_number] => 9/163683
[patent_app_country] => US
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[pdf_file] => patents/06/111/06111310.pdf
[firstpage_image] =>[orig_patent_app_number] => 163683
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/163683 | Radially-increasing core power bus grid architecture | Sep 29, 1998 | Issued |
Array
(
[id] => 4326249
[patent_doc_number] => 06331735
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-18
[patent_title] => 'Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts'
[patent_app_type] => 1
[patent_app_number] => 9/161062
[patent_app_country] => US
[patent_app_date] => 1998-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 1977
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[pdf_file] => patents/06/331/06331735.pdf
[firstpage_image] =>[orig_patent_app_number] => 161062
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/161062 | Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts | Sep 24, 1998 | Issued |
Array
(
[id] => 4159204
[patent_doc_number] => 06124634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Micromachined chip scale package'
[patent_app_type] => 1
[patent_app_number] => 9/156300
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[patent_app_date] => 1998-09-17
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[pdf_file] => patents/06/124/06124634.pdf
[firstpage_image] =>[orig_patent_app_number] => 156300
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/156300 | Micromachined chip scale package | Sep 16, 1998 | Issued |
Array
(
[id] => 4076170
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[patent_issue_date] => 2000-05-30
[patent_title] => 'Arrangement for the reduction of noise in microwave transistors and method for the manufacture thereof'
[patent_app_type] => 1
[patent_app_number] => 9/156202
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[pdf_file] => patents/06/069/06069404.pdf
[firstpage_image] =>[orig_patent_app_number] => 156202
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Array
(
[id] => 1459929
[patent_doc_number] => 06426548
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[patent_issue_date] => 2002-07-30
[patent_title] => 'Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same'
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[patent_app_number] => 09/150693
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[pdf_file] => patents/06/426/06426548.pdf
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Array
(
[id] => 4227392
[patent_doc_number] => 06011277
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[patent_title] => 'Gate insulated field effect transistors and method of manufacturing the same'
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Array
(
[id] => 4282035
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Array
(
[id] => 4180111
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[patent_title] => 'Cavity ball grid array apparatus'
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[firstpage_image] =>[orig_patent_app_number] => 146643
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/146643 | Cavity ball grid array apparatus | Sep 2, 1998 | Issued |
Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/140541 | Electronic device and semiconductor package | Aug 25, 1998 | Issued |
Array
(
[id] => 4161433
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/139412 | Semiconductor device and method for manufacturing the same | Aug 24, 1998 | Issued |