Jasmine Jhihan B. Clark

Array ( [id] => 4030928 [patent_doc_number] => 05883431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Device with power semiconductor components' [patent_app_type] => 1 [patent_app_number] => 8/855887 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1253 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883431.pdf [firstpage_image] =>[orig_patent_app_number] => 855887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4189889 [patent_doc_number] => 06150728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Semiconductor memory device having a pad arrangement with reduced occupying area' [patent_app_type] => 1 [patent_app_number] => 8/854754 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9750 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150728.pdf [firstpage_image] =>[orig_patent_app_number] => 854754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4309738 [patent_doc_number] => 06252249 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Semiconductor device having crystalline silicon clusters' [patent_app_type] => 1 [patent_app_number] => 8/854037 [patent_app_country] => US [patent_app_date] => 1997-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7559 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252249.pdf [firstpage_image] =>[orig_patent_app_number] => 854037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373522 [patent_doc_number] => 06274928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Single deposition layer metal dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 8/852911 [patent_app_country] => US [patent_app_date] => 1997-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 7260 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274928.pdf [firstpage_image] =>[orig_patent_app_number] => 852911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4076111 [patent_doc_number] => 06069400 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/850007 [patent_app_country] => US [patent_app_date] => 1997-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 10452 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069400.pdf [firstpage_image] =>[orig_patent_app_number] => 850007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3874460 [patent_doc_number] => 05838043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'ESD protection circuit located under protected bonding pad' [patent_app_type] => 1 [patent_app_number] => 8/848693 [patent_app_country] => US [patent_app_date] => 1997-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1873 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838043.pdf [firstpage_image] =>[orig_patent_app_number] => 848693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4095188 [patent_doc_number] => 06133639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Compliant interface for semiconductor chip and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/842313 [patent_app_country] => US [patent_app_date] => 1997-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6013 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133639.pdf [firstpage_image] =>[orig_patent_app_number] => 842313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3909309 [patent_doc_number] => 05898218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Structure for mounting electronic components and method for mounting the same' [patent_app_type] => 1 [patent_app_number] => 8/840073 [patent_app_country] => US [patent_app_date] => 1997-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5293 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898218.pdf [firstpage_image] =>[orig_patent_app_number] => 840073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3940835 [patent_doc_number] => 05929528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/844891 [patent_app_country] => US [patent_app_date] => 1997-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6163 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929528.pdf [firstpage_image] =>[orig_patent_app_number] => 844891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4062388 [patent_doc_number] => 05864176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Electro-mechnical subassembly having a greatly reduced thermal resistance between two mating faces by including a film of liquid, that evaporates without leaving any residue, between the faces' [patent_app_type] => 1 [patent_app_number] => 8/833273 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 9170 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864176.pdf [firstpage_image] =>[orig_patent_app_number] => 833273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1563109 [patent_doc_number] => 06362516 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Electronic apparatus' [patent_app_type] => B1 [patent_app_number] => 08/832249 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362516.pdf [firstpage_image] =>[orig_patent_app_number] => 08832249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3909332 [patent_doc_number] => 05898219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Custom corner attach heat sink design for a plastic ball grid array integrated circuit package' [patent_app_type] => 1 [patent_app_number] => 8/832417 [patent_app_country] => US [patent_app_date] => 1997-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1115 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898219.pdf [firstpage_image] =>[orig_patent_app_number] => 832417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4039279 [patent_doc_number] => 05926733 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Metal layer patterns of a semiconductor device and a method for forming the same' [patent_app_type] => 1 [patent_app_number] => 8/832349 [patent_app_country] => US [patent_app_date] => 1997-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 1600 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926733.pdf [firstpage_image] =>[orig_patent_app_number] => 832349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4108726 [patent_doc_number] => 06051883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Manufacturing method and semiconductor device with low contact resistance between transparent electrode and pad electrode' [patent_app_type] => 1 [patent_app_number] => 8/825319 [patent_app_country] => US [patent_app_date] => 1997-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4564 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/051/06051883.pdf [firstpage_image] =>[orig_patent_app_number] => 825319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4091721 [patent_doc_number] => 06018188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/827499 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2361 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018188.pdf [firstpage_image] =>[orig_patent_app_number] => 827499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3782408 [patent_doc_number] => 05818111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Low capacitance interconnect structures in integrated circuits using a stack of low dielectric materials' [patent_app_type] => 1 [patent_app_number] => 8/821989 [patent_app_country] => US [patent_app_date] => 1997-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2789 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818111.pdf [firstpage_image] =>[orig_patent_app_number] => 821989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4103316 [patent_doc_number] => 06049128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/820631 [patent_app_country] => US [patent_app_date] => 1997-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4596 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049128.pdf [firstpage_image] =>[orig_patent_app_number] => 820631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4013721 [patent_doc_number] => 05889327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Semiconductor device with a package having a plurality of bump electrodes and module with a plurality of semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/816779 [patent_app_country] => US [patent_app_date] => 1997-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 6400 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889327.pdf [firstpage_image] =>[orig_patent_app_number] => 816779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031036 [patent_doc_number] => 05883439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer' [patent_app_type] => 1 [patent_app_number] => 8/819261 [patent_app_country] => US [patent_app_date] => 1997-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 2967 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883439.pdf [firstpage_image] =>[orig_patent_app_number] => 819261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3987743 [patent_doc_number] => 05861664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'LSI package and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/819007 [patent_app_country] => US [patent_app_date] => 1997-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4275 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/861/05861664.pdf [firstpage_image] =>[orig_patent_app_number] => 819007 [rel_patent_id] =>[rel_patent_doc_number] =>)