Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18782222 [patent_doc_number] => 11823988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Semiconductor module comprising a housing [patent_app_type] => utility [patent_app_number] => 17/913705 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/913705
Semiconductor module comprising a housing Feb 25, 2021 Issued
Array ( [id] => 18935519 [patent_doc_number] => 11887963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/187686 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 6642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187686 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187686
Semiconductor device Feb 25, 2021 Issued
Array ( [id] => 18494244 [patent_doc_number] => 11699665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 17/172797 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172797
Semiconductor module Feb 9, 2021 Issued
Array ( [id] => 16889038 [patent_doc_number] => 20210175235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/172153 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172153
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Feb 9, 2021 Abandoned
Array ( [id] => 16873584 [patent_doc_number] => 20210167051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => Electronics Card Including Multi-Chip Module [patent_app_type] => utility [patent_app_number] => 17/170224 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17170224 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/170224
Electronics card including multi-chip module Feb 7, 2021 Issued
Array ( [id] => 19370628 [patent_doc_number] => 12062722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Method for fabrication of semiconductor device [patent_app_type] => utility [patent_app_number] => 17/164886 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 38 [patent_no_of_words] => 20722 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17164886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/164886
Method for fabrication of semiconductor device Feb 1, 2021 Issued
Array ( [id] => 16858450 [patent_doc_number] => 20210159195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => LAND GRID ARRAY PATTERNS FOR MODULAR ELECTRONICS PLATFORMS AND METHODS OF PERFORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/162362 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162362 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162362
Land grid array patterns for modular electronics platforms and methods of performing the same Jan 28, 2021 Issued
Array ( [id] => 19260997 [patent_doc_number] => 12021063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Circular bond finger pad [patent_app_type] => utility [patent_app_number] => 17/161105 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10031 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161105 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161105
Circular bond finger pad Jan 27, 2021 Issued
Array ( [id] => 17011006 [patent_doc_number] => 20210242167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => SEMICONDUCTOR PACKAGES USING PACKAGE IN PACKAGE SYSTEMS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/158143 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158143
Semiconductor packages using package in package systems and related methods Jan 25, 2021 Issued
Array ( [id] => 16827806 [patent_doc_number] => 20210143099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/157358 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157358 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/157358
Method of manufacturing a semiconductor structure Jan 24, 2021 Issued
Array ( [id] => 18431709 [patent_doc_number] => 11676939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Discrete polymer in fan-out packages [patent_app_type] => utility [patent_app_number] => 17/140835 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140835
Discrete polymer in fan-out packages Jan 3, 2021 Issued
Array ( [id] => 17708645 [patent_doc_number] => 20220208653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => DUAL-SIDE COOLING SEMICONDUCTOR PACKAGES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/136299 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136299
Dual-side cooling semiconductor packages and related methods Dec 28, 2020 Issued
Array ( [id] => 16936539 [patent_doc_number] => 20210202428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => BONDED STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/131588 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131588
Bonded structures Dec 21, 2020 Issued
Array ( [id] => 16904931 [patent_doc_number] => 20210183847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => STACKED DIES AND METHODS FOR FORMING BONDED STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/131329 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131329
Stacked dies and methods for forming bonded structures Dec 21, 2020 Issued
Array ( [id] => 19552891 [patent_doc_number] => 12136604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Bonding apparatus and bonding method [patent_app_type] => utility [patent_app_number] => 17/436621 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7242 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17436621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/436621
Bonding apparatus and bonding method Dec 20, 2020 Issued
Array ( [id] => 17115672 [patent_doc_number] => 20210296269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR STRUCTURE CONTAINING MULTILAYER BONDING PADS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/118036 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118036
Semiconductor structure containing multilayer bonding pads and methods of forming the same Dec 9, 2020 Issued
Array ( [id] => 17006867 [patent_doc_number] => 20210238028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => Packaged Die and Assembling Method [patent_app_type] => utility [patent_app_number] => 17/116884 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17116884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/116884
Packaged die and assembling method Dec 8, 2020 Issued
Array ( [id] => 16715735 [patent_doc_number] => 20210082882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/107614 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107614 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107614
Semiconductor package structure Nov 29, 2020 Issued
Array ( [id] => 16731360 [patent_doc_number] => 20210098508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => SEMICONDUCTOR ELEMENT AND DISPLAY DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/106095 [patent_app_country] => US [patent_app_date] => 2020-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106095
SEMICONDUCTOR ELEMENT AND DISPLAY DEVICE USING THE SAME Nov 27, 2020 Abandoned
Array ( [id] => 16692184 [patent_doc_number] => 20210074663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => UNIFORM ELECTROCHEMICAL PLATING OF METAL ONTO ARRAYS OF PILLARS HAVING DIFFERENT LATERAL DENSITIES AND RELATED TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/102253 [patent_app_country] => US [patent_app_date] => 2020-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102253 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102253
Uniform electrochemical plating of metal onto arrays of pillars having different lateral densities and related technology Nov 22, 2020 Issued
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