| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Semiconductor structures and method of manufacturing'
[patent_app_type] => 1
[patent_app_number] => 8/594511
[patent_app_country] => US
[patent_app_date] => 1996-01-31
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[firstpage_image] =>[orig_patent_app_number] => 594511
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Array
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[id] => 3729996
[patent_doc_number] => 05701033
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/593965
[patent_app_country] => US
[patent_app_date] => 1996-01-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/701/05701033.pdf
[firstpage_image] =>[orig_patent_app_number] => 593965
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/593965 | Semiconductor device | Jan 29, 1996 | Issued |
| 08/592237 | HIGHLY PURIFIED TITANIUM MATERIAL, METHOD FOR PREPARATION OF IT AND SPUTTERING TARGET USING IT | Jan 25, 1996 | Pending |
Array
(
[id] => 3954312
[patent_doc_number] => 05977629
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Condensed memory matrix'
[patent_app_type] => 1
[patent_app_number] => 8/590775
[patent_app_country] => US
[patent_app_date] => 1996-01-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/977/05977629.pdf
[firstpage_image] =>[orig_patent_app_number] => 590775
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/590775 | Condensed memory matrix | Jan 23, 1996 | Issued |
Array
(
[id] => 3896260
[patent_doc_number] => 05834830
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'LOC (lead on chip) package and fabricating method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/588789
[patent_app_country] => US
[patent_app_date] => 1996-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/834/05834830.pdf
[firstpage_image] =>[orig_patent_app_number] => 588789
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/588789 | LOC (lead on chip) package and fabricating method thereof | Jan 18, 1996 | Issued |
Array
(
[id] => 3707297
[patent_doc_number] => 05675181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-07
[patent_title] => 'Zirconia-added alumina substrate with direct bonding of copper'
[patent_app_type] => 1
[patent_app_number] => 8/588680
[patent_app_country] => US
[patent_app_date] => 1996-01-19
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[pdf_file] => patents/05/675/05675181.pdf
[firstpage_image] =>[orig_patent_app_number] => 588680
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/588680 | Zirconia-added alumina substrate with direct bonding of copper | Jan 18, 1996 | Issued |
| 08/584277 | CERAMIC IC PACKAGE BASE AND CERAMIC COVER | Jan 10, 1996 | Abandoned |
Array
(
[id] => 4031010
[patent_doc_number] => 05883437
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-16
[patent_title] => 'Method and apparatus for inspection and correction of wiring of electronic circuit and for manufacture thereof'
[patent_app_type] => 1
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[patent_app_date] => 1995-12-28
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[firstpage_image] =>[orig_patent_app_number] => 580531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580531 | Method and apparatus for inspection and correction of wiring of electronic circuit and for manufacture thereof | Dec 27, 1995 | Issued |
Array
(
[id] => 3789294
[patent_doc_number] => RE035827
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Surface field effect transistor with depressed source and/or drain areas for ULSI integrated devices'
[patent_app_type] => 2
[patent_app_number] => 8/575846
[patent_app_country] => US
[patent_app_date] => 1995-12-21
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[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/RE/035/RE035827.pdf
[firstpage_image] =>[orig_patent_app_number] => 575846
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/575846 | Surface field effect transistor with depressed source and/or drain areas for ULSI integrated devices | Dec 20, 1995 | Issued |
Array
(
[id] => 3780616
[patent_doc_number] => 05757079
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages and the resulting MLTF structure'
[patent_app_type] => 1
[patent_app_number] => 8/577677
[patent_app_country] => US
[patent_app_date] => 1995-12-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/757/05757079.pdf
[firstpage_image] =>[orig_patent_app_number] => 577677
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/577677 | Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages and the resulting MLTF structure | Dec 20, 1995 | Issued |
Array
(
[id] => 3653057
[patent_doc_number] => 05684333
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Wafer structure in a semiconductor device manufacturing process'
[patent_app_type] => 1
[patent_app_number] => 8/571513
[patent_app_country] => US
[patent_app_date] => 1995-12-13
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[firstpage_image] =>[orig_patent_app_number] => 571513
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/571513 | Wafer structure in a semiconductor device manufacturing process | Dec 12, 1995 | Issued |
Array
(
[id] => 3980821
[patent_doc_number] => 05917236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Packaging system for field effects transistors'
[patent_app_type] => 1
[patent_app_number] => 8/569443
[patent_app_country] => US
[patent_app_date] => 1995-12-08
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[firstpage_image] =>[orig_patent_app_number] => 569443
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/569443 | Packaging system for field effects transistors | Dec 7, 1995 | Issued |
Array
(
[id] => 3794790
[patent_doc_number] => 05841189
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/567525
[patent_app_country] => US
[patent_app_date] => 1995-12-05
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[pdf_file] => patents/05/841/05841189.pdf
[firstpage_image] =>[orig_patent_app_number] => 567525
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567525 | Semiconductor device and manufacturing method thereof | Dec 4, 1995 | Issued |
| 08/567411 | SEMICONDUCTOR SENSOR AND MANUFACTURING METHOD THEREOF | Dec 4, 1995 | Abandoned |
Array
(
[id] => 3668624
[patent_doc_number] => 05668383
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[patent_issue_date] => 1997-09-16
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/554239 | Semiconductor device for bidirectional non-conducted optical data transmission | Nov 7, 1995 | Issued |
Array
(
[id] => 3732626
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[patent_issue_date] => 1997-07-29
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[firstpage_image] =>[orig_patent_app_number] => 551849
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/551849 | Package for a semiconductor element | Nov 6, 1995 | Issued |
Array
(
[id] => 3513767
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[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Structure heat sink for power semiconductors'
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[patent_app_date] => 1995-10-27
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[firstpage_image] =>[orig_patent_app_number] => 549231
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/549231 | Structure heat sink for power semiconductors | Oct 26, 1995 | Issued |
Array
(
[id] => 3782424
[patent_doc_number] => 05818112
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/549201 | Arrangement for capacitive signal transmission between the chip layers of a vertically integrated circuit | Oct 26, 1995 | Issued |
Array
(
[id] => 3660336
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[patent_issue_date] => 1997-04-22
[patent_title] => 'Lead frame having cut-out wing leads'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/549529 | Lead frame having cut-out wing leads | Oct 26, 1995 | Issued |
Array
(
[id] => 3692536
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[patent_issue_date] => 1997-12-09
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[firstpage_image] =>[orig_patent_app_number] => 542995
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/542995 | Microelectronic package with device cooling | Oct 12, 1995 | Issued |