Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11063710 [patent_doc_number] => 20160260672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/156926 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3630 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156926 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156926
Semiconductor apparatus May 16, 2016 Issued
Array ( [id] => 11578711 [patent_doc_number] => 09633981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Systems and methods for bonding semiconductor elements' [patent_app_type] => utility [patent_app_number] => 15/147015 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5290 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147015 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/147015
Systems and methods for bonding semiconductor elements May 4, 2016 Issued
Array ( [id] => 11325059 [patent_doc_number] => 20160355671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'NANOPARTICLE, METHOD FOR PRODUCING NANOPARTICLE, ADDITION CURING SILICONE RESIN COMPOSITION, AND SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/146102 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10984 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146102 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146102
Nanoparticle, method for producing nanoparticle, addition curing silicone resin composition, and semiconductor apparatus May 3, 2016 Issued
Array ( [id] => 11300662 [patent_doc_number] => 09508673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Wire bonding method' [patent_app_type] => utility [patent_app_number] => 15/143227 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15143227 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/143227
Wire bonding method Apr 28, 2016 Issued
Array ( [id] => 12250152 [patent_doc_number] => 09922934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Semiconductor manufacturing process and package carrier' [patent_app_type] => utility [patent_app_number] => 15/141836 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 31 [patent_no_of_words] => 5276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141836 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141836
Semiconductor manufacturing process and package carrier Apr 28, 2016 Issued
Array ( [id] => 11466787 [patent_doc_number] => 09583427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Semiconductor substrate, semiconductor package structure and method of making the same' [patent_app_type] => utility [patent_app_number] => 15/138107 [patent_app_country] => US [patent_app_date] => 2016-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15138107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/138107
Semiconductor substrate, semiconductor package structure and method of making the same Apr 24, 2016 Issued
Array ( [id] => 11578705 [patent_doc_number] => 09633975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Multi-die wirebond packages with elongated windows' [patent_app_type] => utility [patent_app_number] => 15/131522 [patent_app_country] => US [patent_app_date] => 2016-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 10113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15131522 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/131522
Multi-die wirebond packages with elongated windows Apr 17, 2016 Issued
Array ( [id] => 11551571 [patent_doc_number] => 09620427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Semiconductor device, related manufacturing method, and related electronic device' [patent_app_type] => utility [patent_app_number] => 15/098855 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 7014 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15098855 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/098855
Semiconductor device, related manufacturing method, and related electronic device Apr 13, 2016 Issued
Array ( [id] => 11043494 [patent_doc_number] => 20160240450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/096792 [patent_app_country] => US [patent_app_date] => 2016-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14497 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15096792 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/096792
Semiconductor device Apr 11, 2016 Issued
Array ( [id] => 12141040 [patent_doc_number] => 20180019123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'Laser irradiation induced surface planarization of polycrystalline silicon films' [patent_app_type] => utility [patent_app_number] => 15/546914 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5834 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15546914 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/546914
Laser irradiation induced surface planarization of polycrystalline silicon films Apr 7, 2016 Issued
Array ( [id] => 11524521 [patent_doc_number] => 09607932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/093825 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3135 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093825 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/093825
Semiconductor device Apr 7, 2016 Issued
Array ( [id] => 11548621 [patent_doc_number] => 09617455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Silicone resin composition for sealant and power semiconductor module that uses this composition' [patent_app_type] => utility [patent_app_number] => 15/090861 [patent_app_country] => US [patent_app_date] => 2016-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4988 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15090861 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/090861
Silicone resin composition for sealant and power semiconductor module that uses this composition Apr 4, 2016 Issued
Array ( [id] => 11983581 [patent_doc_number] => 20170287736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'COMPLEX CAVITY FORMATION IN MOLDED PACKAGING STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/085538 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7550 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15085538 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/085538
Complex cavity formation in molded packaging structures Mar 29, 2016 Issued
Array ( [id] => 12195573 [patent_doc_number] => 09899309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Electronic package and semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 15/084762 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2670 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084762 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084762
Electronic package and semiconductor substrate Mar 29, 2016 Issued
Array ( [id] => 13088393 [patent_doc_number] => 10064277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Integrated passive devices and assemblies including same [patent_app_type] => utility [patent_app_number] => 15/084046 [patent_app_country] => US [patent_app_date] => 2016-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7278 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084046 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084046
Integrated passive devices and assemblies including same Mar 28, 2016 Issued
Array ( [id] => 11578654 [patent_doc_number] => 09633925 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'Visualization of alignment marks on a chip covered by a pre-applied underfill' [patent_app_type] => utility [patent_app_number] => 15/081403 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15081403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/081403
Visualization of alignment marks on a chip covered by a pre-applied underfill Mar 24, 2016 Issued
Array ( [id] => 11967079 [patent_doc_number] => 20170271232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'UNDERFILL DISPENSING USING FUNNELS' [patent_app_type] => utility [patent_app_number] => 15/072957 [patent_app_country] => US [patent_app_date] => 2016-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15072957 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/072957
Underfill dispensing using funnels Mar 16, 2016 Issued
Array ( [id] => 17925927 [patent_doc_number] => 11469190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Parasitic-aware integrated substrate balanced filter and apparatus to achieve transmission zeros [patent_app_type] => utility [patent_app_number] => 16/078001 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/078001
Parasitic-aware integrated substrate balanced filter and apparatus to achieve transmission zeros Mar 14, 2016 Issued
Array ( [id] => 11495392 [patent_doc_number] => 20170069577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'SEMICONDUCTOR DEVICE, INSPECTION PATTERN ARRANGEMENT METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/060689 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060689
SEMICONDUCTOR DEVICE, INSPECTION PATTERN ARRANGEMENT METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Mar 3, 2016 Abandoned
Array ( [id] => 10993155 [patent_doc_number] => 20160190101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'FUNCTIONAL BLOCK STACKED 3DIC AND METHOD OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 15/060341 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060341 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060341
Functional block stacked 3DIC and method of making same Mar 2, 2016 Issued
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