
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10502488
[patent_doc_number] => 09230891
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-05
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/246448
[patent_app_country] => US
[patent_app_date] => 2014-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4704
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14246448
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/246448 | Semiconductor device | Apr 6, 2014 | Issued |
Array
(
[id] => 10138451
[patent_doc_number] => 09171773
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-27
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/245261
[patent_app_country] => US
[patent_app_date] => 2014-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 6272
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14245261
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/245261 | Semiconductor device | Apr 3, 2014 | Issued |
Array
(
[id] => 11796686
[patent_doc_number] => 09406531
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-08-02
[patent_title] => 'Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 14/229280
[patent_app_country] => US
[patent_app_date] => 2014-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 68
[patent_no_of_words] => 24406
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14229280
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/229280 | Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof | Mar 27, 2014 | Issued |
Array
(
[id] => 11265926
[patent_doc_number] => 09490228
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Anisotropic conductive film including conductive adhesive layer and semiconductor device connected by the same'
[patent_app_type] => utility
[patent_app_number] => 14/229003
[patent_app_country] => US
[patent_app_date] => 2014-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 8109
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14229003
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/229003 | Anisotropic conductive film including conductive adhesive layer and semiconductor device connected by the same | Mar 27, 2014 | Issued |
Array
(
[id] => 10681614
[patent_doc_number] => 20160027759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'Process for Connecting Joining Parts'
[patent_app_type] => utility
[patent_app_number] => 14/773970
[patent_app_country] => US
[patent_app_date] => 2014-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5160
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14773970
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/773970 | Process for connecting joining parts | Mar 23, 2014 | Issued |
Array
(
[id] => 9600865
[patent_doc_number] => 20140197547
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-17
[patent_title] => 'PACKAGE ON PACKAGE STRUCTURES AND METHODS FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/212233
[patent_app_country] => US
[patent_app_date] => 2014-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 6059
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14212233
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/212233 | Package on package structures and methods for forming the same | Mar 13, 2014 | Issued |
Array
(
[id] => 12498450
[patent_doc_number] => 09997444
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => Microelectronic package having a passive microelectronic device disposed within a package body
[patent_app_type] => utility
[patent_app_number] => 15/117716
[patent_app_country] => US
[patent_app_date] => 2014-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 5515
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15117716
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/117716 | Microelectronic package having a passive microelectronic device disposed within a package body | Mar 11, 2014 | Issued |
Array
(
[id] => 11483366
[patent_doc_number] => 09589921
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-07
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/773817
[patent_app_country] => US
[patent_app_date] => 2014-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 8709
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14773817
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/773817 | Semiconductor device | Mar 9, 2014 | Issued |
Array
(
[id] => 10028488
[patent_doc_number] => 09070393
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-30
[patent_title] => 'Three-dimensional structure in which wiring is provided on its surface'
[patent_app_type] => utility
[patent_app_number] => 14/196363
[patent_app_country] => US
[patent_app_date] => 2014-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 51
[patent_no_of_words] => 27687
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14196363
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/196363 | Three-dimensional structure in which wiring is provided on its surface | Mar 3, 2014 | Issued |
Array
(
[id] => 10041727
[patent_doc_number] => 09082438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-14
[patent_title] => 'Three-dimensional structure for wiring formation'
[patent_app_type] => utility
[patent_app_number] => 14/196370
[patent_app_country] => US
[patent_app_date] => 2014-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 51
[patent_no_of_words] => 25829
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14196370
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/196370 | Three-dimensional structure for wiring formation | Mar 3, 2014 | Issued |
Array
(
[id] => 9559466
[patent_doc_number] => 20140177178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-26
[patent_title] => 'PRINTED ELECTRONICS'
[patent_app_type] => utility
[patent_app_number] => 14/189501
[patent_app_country] => US
[patent_app_date] => 2014-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 6344
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14189501
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/189501 | Printed electronics | Feb 24, 2014 | Issued |
Array
(
[id] => 9557968
[patent_doc_number] => 20140175679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-26
[patent_title] => 'SEMICONDUCTOR DEVICES, PACKAGE SUBSTRATES, SEMICONDUCTOR PACKAGES, PACKAGE STACK STRUCTURES, AND ELECTRONIC SYSTEMS HAVING FUNCTIONALLY ASYMMETRIC CONDUCTIVE ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 14/190079
[patent_app_country] => US
[patent_app_date] => 2014-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 99
[patent_figures_cnt] => 99
[patent_no_of_words] => 28191
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14190079
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/190079 | Semiconductor devices, package substrates, semiconductor packages, package stack structures, and electronic systems having functionally asymmetric conductive elements | Feb 24, 2014 | Issued |
Array
(
[id] => 9542614
[patent_doc_number] => 20140167260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'SEMICONDUCTOR PACKAGES INCLUDING A PLURALITY OF UPPER SEMICONDUCTOR DEVICES ON A LOWER SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/188417
[patent_app_country] => US
[patent_app_date] => 2014-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 48
[patent_no_of_words] => 29446
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14188417
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/188417 | Semiconductor packages including a plurality of upper semiconductor devices on a lower semiconductor device | Feb 23, 2014 | Issued |
Array
(
[id] => 10004128
[patent_doc_number] => 09048225
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Semiconductor device and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/185872
[patent_app_country] => US
[patent_app_date] => 2014-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 84
[patent_no_of_words] => 25821
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185872
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/185872 | Semiconductor device and method for manufacturing semiconductor device | Feb 19, 2014 | Issued |
Array
(
[id] => 9965414
[patent_doc_number] => 09013031
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-21
[patent_title] => 'Semiconductor packages including heat diffusion vias and interconnection vias'
[patent_app_type] => utility
[patent_app_number] => 14/185394
[patent_app_country] => US
[patent_app_date] => 2014-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 6541
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185394
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/185394 | Semiconductor packages including heat diffusion vias and interconnection vias | Feb 19, 2014 | Issued |
Array
(
[id] => 10377899
[patent_doc_number] => 20150262906
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-17
[patent_title] => 'COF Type Semiconductor Package and Method of Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 14/370391
[patent_app_country] => US
[patent_app_date] => 2014-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5926
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14370391
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/370391 | COF type semiconductor package and method of manufacturing the same | Feb 13, 2014 | Issued |
Array
(
[id] => 10195794
[patent_doc_number] => 09224709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-29
[patent_title] => 'Semiconductor device including an embedded surface mount device and method of forming the same'
[patent_app_type] => utility
[patent_app_number] => 14/180138
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5127
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180138
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/180138 | Semiconductor device including an embedded surface mount device and method of forming the same | Feb 12, 2014 | Issued |
Array
(
[id] => 10165354
[patent_doc_number] => 09196586
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-24
[patent_title] => 'Semiconductor package including an embedded surface mount device and method of forming the same'
[patent_app_type] => utility
[patent_app_number] => 14/180084
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5955
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180084
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/180084 | Semiconductor package including an embedded surface mount device and method of forming the same | Feb 12, 2014 | Issued |
Array
(
[id] => 9893320
[patent_doc_number] => 20150048519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-19
[patent_title] => 'SEMICONDUCTOR DEVICES WITH THROUGH VIA ELECTRODES, METHODS OF FABRICARING THE SAME, MEMORY CARDS INCLUDING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/180327
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5895
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180327
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/180327 | Semiconductor devices with through via electrodes, methods of fabricating the same, memory cards including the same, and electronic systems including the same | Feb 12, 2014 | Issued |
Array
(
[id] => 10343627
[patent_doc_number] => 20150228632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-13
[patent_title] => 'Packaged Semiconductor Devices and Methods of Packaging Semiconductor Devices'
[patent_app_type] => utility
[patent_app_number] => 14/180208
[patent_app_country] => US
[patent_app_date] => 2014-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5553
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14180208
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/180208 | Packaged semiconductor devices and methods of packaging semiconductor devices | Feb 12, 2014 | Issued |