Jasmine Jhihan B. Clark

Array ( [id] => 7750619 [patent_doc_number] => 20120025391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Semiconductor device and multilayer semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/067660 [patent_app_country] => US [patent_app_date] => 2011-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16693 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025391.pdf [firstpage_image] =>[orig_patent_app_number] => 13067660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8772999 [patent_doc_number] => 08426958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Stacked chip package with redistribution lines' [patent_app_type] => utility [patent_app_number] => 13/159368 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 8057 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9524799 [patent_doc_number] => 08749076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Resin paste composition' [patent_app_type] => utility [patent_app_number] => 13/704639 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 8447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13704639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7648862 [patent_doc_number] => 20110298131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Yttrium contacts for germanium semiconductor radiation detectors' [patent_app_type] => utility [patent_app_number] => 13/068811 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3851 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20110298131.pdf [firstpage_image] =>[orig_patent_app_number] => 13068811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8294943 [patent_doc_number] => 08222729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Electric power converter' [patent_app_type] => utility [patent_app_number] => 13/068767 [patent_app_country] => US [patent_app_date] => 2011-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 9036 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13068767 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8818513 [patent_doc_number] => 20130119558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'Stacked Semiconductor Package' [patent_app_type] => utility [patent_app_number] => 13/697288 [patent_app_country] => US [patent_app_date] => 2011-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5303 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13697288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8826025 [patent_doc_number] => 20130127070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'Stacked Seminconductor Package' [patent_app_type] => utility [patent_app_number] => 13/697266 [patent_app_country] => US [patent_app_date] => 2011-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3260 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13697266 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8578306 [patent_doc_number] => 08344519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Stacked-die package for battery power management' [patent_app_type] => utility [patent_app_number] => 13/089065 [patent_app_country] => US [patent_app_date] => 2011-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4665 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089065 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9027130 [patent_doc_number] => 08536713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'System in package with heat sink' [patent_app_type] => utility [patent_app_number] => 13/078327 [patent_app_country] => US [patent_app_date] => 2011-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5516 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13078327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8249167 [patent_doc_number] => 20120153488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'SIMULTANEOUS WAFER BONDING AND INTERCONNECT JOINING' [patent_app_type] => utility [patent_app_number] => 13/076969 [patent_app_country] => US [patent_app_date] => 2011-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5563 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20120153488.pdf [firstpage_image] =>[orig_patent_app_number] => 13076969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10876964 [patent_doc_number] => 08901754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/076555 [patent_app_country] => US [patent_app_date] => 2011-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8092 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13076555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8071667 [patent_doc_number] => 20110241191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'SEMICONDUCTOR LAMINATION PACKAGE AND METHOD OF PRODUCING SEMICONDUCTOR LAMINATION PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/074286 [patent_app_country] => US [patent_app_date] => 2011-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4174 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241191.pdf [firstpage_image] =>[orig_patent_app_number] => 13074286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7480971 [patent_doc_number] => 20110233739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'SEMICONDUCTOR STRUCTURE, MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/074233 [patent_app_country] => US [patent_app_date] => 2011-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 8682 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233739.pdf [firstpage_image] =>[orig_patent_app_number] => 13074233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8237477 [patent_doc_number] => 20120146209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'PACKAGING SUBSTRATE HAVING THROUGH-HOLED INTERPOSER EMBEDDED THEREIN AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/074467 [patent_app_country] => US [patent_app_date] => 2011-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5445 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13074467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7481095 [patent_doc_number] => 20110233787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/074279 [patent_app_country] => US [patent_app_date] => 2011-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3578 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233787.pdf [firstpage_image] =>[orig_patent_app_number] => 13074279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8049715 [patent_doc_number] => 20120074593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'CHIP STACKED STRUCTURE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/072951 [patent_app_country] => US [patent_app_date] => 2011-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2471 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074593.pdf [firstpage_image] =>[orig_patent_app_number] => 13072951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7773171 [patent_doc_number] => 20120038035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'SEMICONDUCTOR PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/072746 [patent_app_country] => US [patent_app_date] => 2011-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15998 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20120038035.pdf [firstpage_image] =>[orig_patent_app_number] => 13072746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8237485 [patent_doc_number] => 20120146217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'CONDUCTIVE PAD STRUCTURE, CHIP PACKAGE STRUCTURE AND DEVICE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/071515 [patent_app_country] => US [patent_app_date] => 2011-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3265 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13071515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8713844 [patent_doc_number] => 08399986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Method for performing parallel stochastic assembly' [patent_app_type] => utility [patent_app_number] => 13/072558 [patent_app_country] => US [patent_app_date] => 2011-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6769 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13072558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7481010 [patent_doc_number] => 20110233755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Semiconductor Housing Package, Semiconductor Package Structure Including The Semiconductor Housing Package, And Processor-Based System Including The Semiconductor Package Structure' [patent_app_type] => utility [patent_app_number] => 13/072012 [patent_app_country] => US [patent_app_date] => 2011-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233755.pdf [firstpage_image] =>[orig_patent_app_number] => 13072012 [rel_patent_id] =>[rel_patent_doc_number] =>)