Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 103861 [patent_doc_number] => 07723852 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-25 [patent_title] => 'Stacked semiconductor package and method of making same' [patent_app_type] => utility [patent_app_number] => 12/017266 [patent_app_country] => US [patent_app_date] => 2008-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 39 [patent_no_of_words] => 17225 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723852.pdf [firstpage_image] =>[orig_patent_app_number] => 12017266 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017266
Stacked semiconductor package and method of making same Jan 20, 2008 Issued
Array ( [id] => 4946433 [patent_doc_number] => 20080302559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'Flexible and elastic dielectric integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/009581 [patent_app_country] => US [patent_app_date] => 2008-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 27084 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20080302559.pdf [firstpage_image] =>[orig_patent_app_number] => 12009581 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/009581
Flexible and elastic dielectric integrated circuit Jan 17, 2008 Issued
Array ( [id] => 33692 [patent_doc_number] => 07791181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Device structure with preformed ring and method therefor' [patent_app_type] => utility [patent_app_number] => 12/014636 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 3486 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/791/07791181.pdf [firstpage_image] =>[orig_patent_app_number] => 12014636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014636
Device structure with preformed ring and method therefor Jan 14, 2008 Issued
Array ( [id] => 4829440 [patent_doc_number] => 20080128884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Stacked Die Package' [patent_app_type] => utility [patent_app_number] => 12/014632 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128884.pdf [firstpage_image] =>[orig_patent_app_number] => 12014632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014632
Stacked die package Jan 14, 2008 Issued
Array ( [id] => 7796370 [patent_doc_number] => 08125078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Semiconductor element cooling structure' [patent_app_type] => utility [patent_app_number] => 12/521225 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4450 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125078.pdf [firstpage_image] =>[orig_patent_app_number] => 12521225 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/521225
Semiconductor element cooling structure Jan 8, 2008 Issued
Array ( [id] => 4925229 [patent_doc_number] => 20080164592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'APPARATUS AND METHOD FOR HOUSING MICROMECHANICAL SYSTEMS' [patent_app_type] => utility [patent_app_number] => 11/971371 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4097 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164592.pdf [firstpage_image] =>[orig_patent_app_number] => 11971371 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/971371
Apparatus and method for housing micromechanical systems Jan 8, 2008 Issued
Array ( [id] => 4446088 [patent_doc_number] => 07863759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Package structure and method for chip with two arrays of bonding pads on BGA substrate for preventing gold bonding wires from collapse' [patent_app_type] => utility [patent_app_number] => 12/007361 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1349 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863759.pdf [firstpage_image] =>[orig_patent_app_number] => 12007361 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007361
Package structure and method for chip with two arrays of bonding pads on BGA substrate for preventing gold bonding wires from collapse Jan 8, 2008 Issued
Array ( [id] => 93105 [patent_doc_number] => 07732882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Method and system for electrically coupling a chip to chip package' [patent_app_type] => utility [patent_app_number] => 11/971150 [patent_app_country] => US [patent_app_date] => 2008-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3123 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732882.pdf [firstpage_image] =>[orig_patent_app_number] => 11971150 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/971150
Method and system for electrically coupling a chip to chip package Jan 7, 2008 Issued
Array ( [id] => 4820857 [patent_doc_number] => 20080122112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/007071 [patent_app_country] => US [patent_app_date] => 2008-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4960 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20080122112.pdf [firstpage_image] =>[orig_patent_app_number] => 12007071 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007071
Semiconductor device and method for fabricating the same Jan 6, 2008 Issued
Array ( [id] => 4526837 [patent_doc_number] => 07952160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Packaged voltage regulator and inductor array' [patent_app_type] => utility [patent_app_number] => 11/968115 [patent_app_country] => US [patent_app_date] => 2007-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4979 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/952/07952160.pdf [firstpage_image] =>[orig_patent_app_number] => 11968115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968115
Packaged voltage regulator and inductor array Dec 30, 2007 Issued
Array ( [id] => 5432236 [patent_doc_number] => 20090166822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELDING' [patent_app_type] => utility [patent_app_number] => 11/965586 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166822.pdf [firstpage_image] =>[orig_patent_app_number] => 11965586 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965586
Integrated circuit package system with shielding Dec 26, 2007 Issued
Array ( [id] => 23348 [patent_doc_number] => 07800212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Mountable integrated circuit package system with stacking interposer' [patent_app_type] => utility [patent_app_number] => 11/965641 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4172 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800212.pdf [firstpage_image] =>[orig_patent_app_number] => 11965641 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965641
Mountable integrated circuit package system with stacking interposer Dec 26, 2007 Issued
Array ( [id] => 4432565 [patent_doc_number] => 07897437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Thermal interconnect systems methods of production and uses thereof' [patent_app_type] => utility [patent_app_number] => 11/961067 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4801 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/897/07897437.pdf [firstpage_image] =>[orig_patent_app_number] => 11961067 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/961067
Thermal interconnect systems methods of production and uses thereof Dec 19, 2007 Issued
Array ( [id] => 4582674 [patent_doc_number] => 07834350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Semiconductor device with test pads and pad connection unit' [patent_app_type] => utility [patent_app_number] => 12/004401 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3340 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/834/07834350.pdf [firstpage_image] =>[orig_patent_app_number] => 12004401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/004401
Semiconductor device with test pads and pad connection unit Dec 19, 2007 Issued
Array ( [id] => 4870745 [patent_doc_number] => 20080197479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'SEMICONDUCTOR PACKAGE, INTEGRATED CIRCUIT CARDS INCORPORATING THE SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/959276 [patent_app_country] => US [patent_app_date] => 2007-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8251 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197479.pdf [firstpage_image] =>[orig_patent_app_number] => 11959276 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/959276
Semiconductor package, integrated circuit cards incorporating the semiconductor package, and method of manufacturing the same Dec 17, 2007 Issued
Array ( [id] => 4863896 [patent_doc_number] => 20080142955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Heat-dissipating structure and heat-dissipating semiconductor package having the same' [patent_app_type] => utility [patent_app_number] => 12/001612 [patent_app_country] => US [patent_app_date] => 2007-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3155 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20080142955.pdf [firstpage_image] =>[orig_patent_app_number] => 12001612 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/001612
Heat-dissipating structure and heat-dissipating semiconductor package having the same Dec 10, 2007 Issued
Array ( [id] => 236571 [patent_doc_number] => 07595552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Stacked semiconductor package in which semiconductor packages are connected using a connector' [patent_app_type] => utility [patent_app_number] => 11/953182 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4173 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/595/07595552.pdf [firstpage_image] =>[orig_patent_app_number] => 11953182 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/953182
Stacked semiconductor package in which semiconductor packages are connected using a connector Dec 9, 2007 Issued
Array ( [id] => 8340663 [patent_doc_number] => 08242603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Chip identification using top metal layer' [patent_app_type] => utility [patent_app_number] => 12/741839 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12741839 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/741839
Chip identification using top metal layer Dec 9, 2007 Issued
Array ( [id] => 103128 [patent_doc_number] => 07728420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'High current lead electrode for semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/001016 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1045 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728420.pdf [firstpage_image] =>[orig_patent_app_number] => 12001016 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/001016
High current lead electrode for semiconductor device Dec 6, 2007 Issued
Array ( [id] => 185730 [patent_doc_number] => 07649263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/944462 [patent_app_country] => US [patent_app_date] => 2007-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2672 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/649/07649263.pdf [firstpage_image] =>[orig_patent_app_number] => 11944462 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/944462
Semiconductor device Nov 22, 2007 Issued
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