Search

Jasmine Jhihan B. Clark

Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2899, 3621, 2816, 2503
Total Applications
3065
Issued Applications
2831
Pending Applications
98
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 908290 [patent_doc_number] => 07332808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Semiconductor module and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/393531 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 5889 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332808.pdf [firstpage_image] =>[orig_patent_app_number] => 11393531 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/393531
Semiconductor module and method of manufacturing the same Mar 28, 2006 Issued
Array ( [id] => 5697591 [patent_doc_number] => 20060214275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/378651 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3862 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214275.pdf [firstpage_image] =>[orig_patent_app_number] => 11378651 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378651
Semiconductor device Mar 19, 2006 Issued
Array ( [id] => 4974775 [patent_doc_number] => 20070216005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/276941 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20070216005.pdf [firstpage_image] =>[orig_patent_app_number] => 11276941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/276941
Integrated circuit package-in-package system Mar 16, 2006 Issued
Array ( [id] => 5208224 [patent_doc_number] => 20070246808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Power semiconductor module having surface-mountable flat external contacts and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/376871 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6398 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246808.pdf [firstpage_image] =>[orig_patent_app_number] => 11376871 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376871
Power semiconductor module having surface-mountable flat external contacts and method for producing the same Mar 15, 2006 Issued
Array ( [id] => 5239817 [patent_doc_number] => 20070018308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Electronic component and electronic configuration' [patent_app_type] => utility [patent_app_number] => 11/374419 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8258 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018308.pdf [firstpage_image] =>[orig_patent_app_number] => 11374419 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/374419
Electronic component and electronic configuration Mar 13, 2006 Abandoned
Array ( [id] => 5697595 [patent_doc_number] => 20060214279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Contacting device, testing method and corresponding production method' [patent_app_type] => utility [patent_app_number] => 11/374391 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2609 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214279.pdf [firstpage_image] =>[orig_patent_app_number] => 11374391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/374391
Contacting device, testing method and corresponding production method Mar 12, 2006 Issued
Array ( [id] => 833841 [patent_doc_number] => 07397132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/373142 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3295 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/397/07397132.pdf [firstpage_image] =>[orig_patent_app_number] => 11373142 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373142
Semiconductor device Mar 12, 2006 Issued
Array ( [id] => 4992294 [patent_doc_number] => 20070007638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'MEMORY ARRAY MODULE MOUNTING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/308161 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2232 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20070007638.pdf [firstpage_image] =>[orig_patent_app_number] => 11308161 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308161
MEMORY ARRAY MODULE MOUNTING STRUCTURE Mar 8, 2006 Abandoned
Array ( [id] => 5233942 [patent_doc_number] => 20070126097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Chip package structure' [patent_app_type] => utility [patent_app_number] => 11/373531 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6218 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20070126097.pdf [firstpage_image] =>[orig_patent_app_number] => 11373531 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373531
Chip package structure Mar 8, 2006 Abandoned
Array ( [id] => 5256790 [patent_doc_number] => 20070210422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HAVING DIFFERENT BONDABLE HEIGHTS AT LEAD FINGER TIPS' [patent_app_type] => utility [patent_app_number] => 11/276681 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210422.pdf [firstpage_image] =>[orig_patent_app_number] => 11276681 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/276681
Semiconductor package system with substrate having different bondable heights at lead finger tips Mar 8, 2006 Issued
Array ( [id] => 5916615 [patent_doc_number] => 20060237814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Semiconductor device having surface mountable external contact areas and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/370441 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20060237814.pdf [firstpage_image] =>[orig_patent_app_number] => 11370441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/370441
Semiconductor device having surface mountable external contact areas and method for producing the same Mar 7, 2006 Issued
Array ( [id] => 5757416 [patent_doc_number] => 20060208361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Semiconductor chip' [patent_app_type] => utility [patent_app_number] => 11/368671 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20060208361.pdf [firstpage_image] =>[orig_patent_app_number] => 11368671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/368671
Semiconductor chip Mar 6, 2006 Issued
Array ( [id] => 72591 [patent_doc_number] => 07755083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Package module with alignment structure and electronic device with the same' [patent_app_type] => utility [patent_app_number] => 11/365181 [patent_app_country] => US [patent_app_date] => 2006-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2354 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/755/07755083.pdf [firstpage_image] =>[orig_patent_app_number] => 11365181 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/365181
Package module with alignment structure and electronic device with the same Feb 28, 2006 Issued
Array ( [id] => 5219840 [patent_doc_number] => 20070161151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Packaged semiconductor device with dual exposed surfaces and method of manufacturing' [patent_app_type] => utility [patent_app_number] => 11/364399 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5252 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161151.pdf [firstpage_image] =>[orig_patent_app_number] => 11364399 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364399
Packaged semiconductor device with dual exposed surfaces and method of manufacturing Feb 27, 2006 Issued
Array ( [id] => 5002639 [patent_doc_number] => 20070200205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE STACKING' [patent_app_type] => utility [patent_app_number] => 11/307861 [patent_app_country] => US [patent_app_date] => 2006-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3784 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200205.pdf [firstpage_image] =>[orig_patent_app_number] => 11307861 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307861
Integrated circuit package system including die stacking Feb 24, 2006 Issued
Array ( [id] => 5002690 [patent_doc_number] => 20070200257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE' [patent_app_type] => utility [patent_app_number] => 11/307862 [patent_app_country] => US [patent_app_date] => 2006-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200257.pdf [firstpage_image] =>[orig_patent_app_number] => 11307862 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307862
Stackable integrated circuit package system with multiple interconnect interface Feb 24, 2006 Issued
Array ( [id] => 5110508 [patent_doc_number] => 20070194423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH RECESSED SPACER' [patent_app_type] => utility [patent_app_number] => 11/307722 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194423.pdf [firstpage_image] =>[orig_patent_app_number] => 11307722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307722
Stacked integrated circuit package-in-package system with recessed spacer Feb 16, 2006 Issued
Array ( [id] => 496097 [patent_doc_number] => 07211902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Method of forming a bonding pad structure' [patent_app_type] => utility [patent_app_number] => 11/354134 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7292 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211902.pdf [firstpage_image] =>[orig_patent_app_number] => 11354134 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/354134
Method of forming a bonding pad structure Feb 14, 2006 Issued
Array ( [id] => 7492394 [patent_doc_number] => 08030755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Integrated circuit package system with a heat sink' [patent_app_type] => utility [patent_app_number] => 11/307532 [patent_app_country] => US [patent_app_date] => 2006-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030755.pdf [firstpage_image] =>[orig_patent_app_number] => 11307532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307532
Integrated circuit package system with a heat sink Feb 9, 2006 Issued
Array ( [id] => 646470 [patent_doc_number] => 07119446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/348351 [patent_app_country] => US [patent_app_date] => 2006-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 9396 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/119/07119446.pdf [firstpage_image] =>[orig_patent_app_number] => 11348351 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/348351
Semiconductor device Feb 6, 2006 Issued
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