
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5697587
[patent_doc_number] => 20060214271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-28
[patent_title] => 'Device and applications for passive RF components in leadframes'
[patent_app_type] => utility
[patent_app_number] => 11/086321
[patent_app_country] => US
[patent_app_date] => 2005-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 6052
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[pdf_file] => publications/A1/0214/20060214271.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/086321 | Device and applications for passive RF components in leadframes | Mar 22, 2005 | Abandoned |
Array
(
[id] => 229255
[patent_doc_number] => 07602070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Room temperature metal direct bonding'
[patent_app_type] => utility
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[patent_app_date] => 2005-03-22
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Array
(
[id] => 484510
[patent_doc_number] => 07221053
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[patent_kind] => B2
[patent_issue_date] => 2007-05-22
[patent_title] => 'Integrated device and electronic system'
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Array
(
[id] => 5757413
[patent_doc_number] => 20060208358
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[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Stacked package integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/086982
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[patent_app_date] => 2005-03-21
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Array
(
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[patent_title] => 'Programmable system in package'
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Array
(
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[patent_doc_number] => 07160796
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[patent_title] => 'Method for manufacturing wiring board and semiconductor device'
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Array
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[patent_title] => 'Semiconductor device including semiconductor element mounted on another semiconductor element'
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Array
(
[id] => 485583
[patent_doc_number] => 07217631
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[patent_issue_date] => 2007-05-15
[patent_title] => 'Semiconductor device and method for fabricating the device'
[patent_app_type] => utility
[patent_app_number] => 11/077212
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[pdf_file] => patents/07/217/07217631.pdf
[firstpage_image] =>[orig_patent_app_number] => 11077212
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Array
(
[id] => 7162190
[patent_doc_number] => 20050199986
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[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Leadframe with die pad'
[patent_app_type] => utility
[patent_app_number] => 11/076951
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Array
(
[id] => 810567
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[patent_title] => 'Semiconductor device and method for manufacturing the same'
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[pdf_file] => patents/07/417/07417324.pdf
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Array
(
[id] => 5878129
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[patent_issue_date] => 2006-02-09
[patent_title] => '3-D stackable semiconductor package'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/074732 | 3-D stackable semiconductor package | Mar 8, 2005 | Issued |
Array
(
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/057132 | PACKAGED CHIP CAPABLE OF LOWERING CHARACTERISTIC IMPEDANCE | Feb 14, 2005 | Abandoned |