
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7072784
[patent_doc_number] => 20050146050
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'FLIP CHIP PACKAGE STRUCTURE AND CHIP STRUCTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 10/904512
[patent_app_country] => US
[patent_app_date] => 2004-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1766
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20050146050.pdf
[firstpage_image] =>[orig_patent_app_number] => 10904512
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904512 | FLIP CHIP PACKAGE STRUCTURE AND CHIP STRUCTURE THEREOF | Nov 13, 2004 | Abandoned |
Array
(
[id] => 7072751
[patent_doc_number] => 20050146017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Power supply connection structure to a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/986151
[patent_app_country] => US
[patent_app_date] => 2004-11-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0146/20050146017.pdf
[firstpage_image] =>[orig_patent_app_number] => 10986151
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/986151 | Power supply connection structure to a semiconductor device | Nov 11, 2004 | Issued |
Array
(
[id] => 6903476
[patent_doc_number] => 20050098871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Semiconductor device with semiconductor chip and rewiring layer and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 10/985051
[patent_app_country] => US
[patent_app_date] => 2004-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/985051 | Semiconductor device with semiconductor chip and rewiring layer and method for producing the same | Nov 9, 2004 | Issued |
Array
(
[id] => 954123
[patent_doc_number] => 06958538
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-10-25
[patent_title] => 'Computer system architecture using a proximity I/O switch'
[patent_app_type] => utility
[patent_app_number] => 10/983250
[patent_app_country] => US
[patent_app_date] => 2004-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1928
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[pdf_file] => patents/06/958/06958538.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/983250 | Computer system architecture using a proximity I/O switch | Nov 3, 2004 | Issued |
Array
(
[id] => 6903484
[patent_doc_number] => 20050098879
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[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Semiconductor package having ultra-thin thickness and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/982361
[patent_app_country] => US
[patent_app_date] => 2004-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3825
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/982361 | Semiconductor package having ultra-thin thickness and method of manufacturing the same | Nov 2, 2004 | Issued |
Array
(
[id] => 885873
[patent_doc_number] => 07352062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-01
[patent_title] => 'Integrated circuit package design'
[patent_app_type] => utility
[patent_app_number] => 10/979491
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[firstpage_image] =>[orig_patent_app_number] => 10979491
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/979491 | Integrated circuit package design | Nov 1, 2004 | Issued |
Array
(
[id] => 673106
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[patent_title] => 'Multi-chip semiconductor package and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/980671
[patent_app_country] => US
[patent_app_date] => 2004-11-02
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[pdf_file] => patents/07/091/07091623.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/980671 | Multi-chip semiconductor package and fabrication method thereof | Nov 1, 2004 | Issued |
Array
(
[id] => 7101441
[patent_doc_number] => 20050104167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'Flip-chip type quad flat package and leadframe'
[patent_app_type] => utility
[patent_app_number] => 10/979881
[patent_app_country] => US
[patent_app_date] => 2004-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2501
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[pdf_file] => publications/A1/0104/20050104167.pdf
[firstpage_image] =>[orig_patent_app_number] => 10979881
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/979881 | Flip-chip type quad flat package and leadframe | Oct 31, 2004 | Issued |
Array
(
[id] => 668928
[patent_doc_number] => 07095124
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-22
[patent_title] => 'Semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 10975071
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/975071 | Semiconductor device | Oct 27, 2004 | Issued |
Array
(
[id] => 493451
[patent_doc_number] => 07211467
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[patent_kind] => B2
[patent_issue_date] => 2007-05-01
[patent_title] => 'Method for fabricating leadless packages with mold locking characteristics'
[patent_app_type] => utility
[patent_app_number] => 10/973385
[patent_app_country] => US
[patent_app_date] => 2004-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/07/211/07211467.pdf
[firstpage_image] =>[orig_patent_app_number] => 10973385
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/973385 | Method for fabricating leadless packages with mold locking characteristics | Oct 26, 2004 | Issued |
Array
(
[id] => 730213
[patent_doc_number] => 07042102
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[patent_title] => 'Semiconductor device'
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[pdf_file] => patents/07/042/07042102.pdf
[firstpage_image] =>[orig_patent_app_number] => 10971692
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/971692 | Semiconductor device | Oct 24, 2004 | Issued |
Array
(
[id] => 540317
[patent_doc_number] => 07176580
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[patent_issue_date] => 2007-02-13
[patent_title] => 'Structures and methods for wire bonding over active, brittle and low K dielectric areas of an IC chip'
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Array
(
[id] => 767288
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[patent_title] => 'Multi-chip module'
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Array
(
[id] => 63636
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[patent_title] => 'Flexible and elastic dielectric integrated circuit'
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Array
(
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Array
(
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/574881 | Electronic device and carrier substrate | Sep 30, 2004 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/954181 | Semiconductor device | Sep 30, 2004 | Issued |