
Jasmine Jhihan B. Clark
Examiner (ID: 17130, Phone: (571)272-1726 , Office: P/2816 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2899, 3621, 2816, 2503 |
| Total Applications | 3065 |
| Issued Applications | 2831 |
| Pending Applications | 98 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5898343
[patent_doc_number] => 20060043576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Structures and methods for heat dissipation of semiconductor integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 10/925612
[patent_app_country] => US
[patent_app_date] => 2004-08-25
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[pdf_file] => publications/A1/0043/20060043576.pdf
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Array
(
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[patent_doc_number] => 20050046032
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[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Bonding material and circuit device using the same'
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Array
(
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[patent_issue_date] => 2005-10-13
[patent_title] => 'Exposed pad module integrated a passive device therein'
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Array
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[patent_issue_date] => 2006-02-28
[patent_title] => 'Optimization of routing layers and board space requirements for a ball grid array land pattern'
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Array
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[patent_title] => 'Semiconductor package structure with reduced parasite capacitance and method of fabricating the same'
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Array
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Array
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[patent_title] => 'Semiconductor device having a pair of heat sinks and method for manufacturing the same'
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Array
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[patent_title] => 'Methods and apparatuses for providing stacked-die devices'
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Array
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[patent_title] => 'Mounting structure of electronic component, electro-optic device, electronic equipment, and method for mounting electronic component'
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Array
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[patent_title] => 'Semiconductor package with improved chip attachment and manufacturing method thereof'
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Array
(
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Array
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Array
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Array
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Array
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Array
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