Jason B. Bryan

Array ( [id] => 20586510 [patent_doc_number] => 20260072103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => SAFETY MECHANISM CIRCUIT AND MOTHERBOARD [patent_app_type] => utility [patent_app_number] => 19/001152 [patent_app_country] => US [patent_app_date] => 2024-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19001152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20557036 [patent_doc_number] => 20260056822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => METHODS AND SYSTEMS FOR MANAGING HOST CRITICAL FAILURE EVENTS [patent_app_type] => utility [patent_app_number] => 18/970212 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3478 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848922 [patent_doc_number] => 20250094273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PROCESSOR CORE FAULT HANDLING METHOD AND APPARATUS, DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/970444 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19911504 [patent_doc_number] => 12287713 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-29 [patent_title] => Fault-tolerant computer system with configurable coprocessor component and methods thereof [patent_app_type] => utility [patent_app_number] => 18/951131 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3238 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18951131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20027106 [patent_doc_number] => 20250165328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => ERROR MONITORING SCHEMES USING ALIVENESS RECORD OF THREAD [patent_app_type] => utility [patent_app_number] => 18/949247 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20043212 [patent_doc_number] => 20250181434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => MASTER DEVICE, SLAVE DEVICE, AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/810936 [patent_app_country] => US [patent_app_date] => 2024-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20520308 [patent_doc_number] => 20260044415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => FAILURE PREDICTION AND LOAD BALANCING FOR CHASSIS COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/800403 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20513298 [patent_doc_number] => 20260037399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => HANDLING PROGRAM FAILURE IN ZONE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/788460 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18788460 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19819133 [patent_doc_number] => 20250077340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => METHOD AND APPARATUS FOR MANAGING MEMORY IN MEMORY DISAGGREGATION ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 18/787138 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18787138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20487467 [patent_doc_number] => 20260023666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => Context Aware Collaborative Platform Diagnostics [patent_app_type] => utility [patent_app_number] => 18/779314 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779314 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20564053 [patent_doc_number] => 12566662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Method and computing device for responding to memory fail [patent_app_type] => utility [patent_app_number] => 18/773714 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20494203 [patent_doc_number] => 12536073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Computer-based systems configured for dynamic performance scoring of software agents and methods of use thereof [patent_app_type] => utility [patent_app_number] => 18/756723 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20428311 [patent_doc_number] => 20250390403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => METHOD AND SYSTEM FOR CONFIGURABLE MEMORY TESTING [patent_app_type] => utility [patent_app_number] => 18/750353 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19661777 [patent_doc_number] => 20240428842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => APPARATUSES AND METHODS FOR MULTIPLE TYPES OF ALERT ALONG ALERT BUS [patent_app_type] => utility [patent_app_number] => 18/743309 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19756600 [patent_doc_number] => 20250045165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => CXL MODULE FAULT TOLERANCE USING RAID [patent_app_type] => utility [patent_app_number] => 18/733609 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -39 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20380532 [patent_doc_number] => 20250363025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => FAST CORRELATION RF EXTENSION FOR AUTOMATIC HARDWARE INTERFACE SWITCHING [patent_app_type] => utility [patent_app_number] => 18/673501 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20380432 [patent_doc_number] => 20250362925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => SYSTEMS AND METHODS FOR HANDLING PLATFORM-AGNOSTIC PRE-BOOT HEALTH INFORMATION IN AN INFORMATION HANDLING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/672132 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20265856 [patent_doc_number] => 12436848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Memory device and operation method for generating check points based on write data pattern [patent_app_type] => utility [patent_app_number] => 18/668589 [patent_app_country] => US [patent_app_date] => 2024-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18668589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20290110 [patent_doc_number] => 20250315353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => CONTEXT BASED DIAGNOSTICS IN A HETEROGENEOUS COMPUTING PLATFORM [patent_app_type] => utility [patent_app_number] => 18/625317 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20415729 [patent_doc_number] => 12499015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Instant file system snapshot restoration [patent_app_type] => utility [patent_app_number] => 18/621276 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10491 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621276 [rel_patent_id] =>[rel_patent_doc_number] =>)