Search

Jason Benton

Examiner (ID: 17620)

Most Active Art Unit
3747
Art Unit(s)
3747
Total Applications
707
Issued Applications
603
Pending Applications
47
Abandoned Applications
57

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19568459 [patent_doc_number] => 12143244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Gateway fabric ports [patent_app_type] => utility [patent_app_number] => 17/823237 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 22477 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823237 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823237
Gateway fabric ports Aug 29, 2022 Issued
Array ( [id] => 19810984 [patent_doc_number] => 12242376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Paging in thin-provisioned disaggregated memory [patent_app_type] => utility [patent_app_number] => 17/818816 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/818816
Paging in thin-provisioned disaggregated memory Aug 9, 2022 Issued
Array ( [id] => 18918032 [patent_doc_number] => 11880311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Methods for controlling asynchronous FIFO memory and data transmission system utilizing the same [patent_app_type] => utility [patent_app_number] => 17/881634 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6597 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881634 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881634
Methods for controlling asynchronous FIFO memory and data transmission system utilizing the same Aug 4, 2022 Issued
Array ( [id] => 19795170 [patent_doc_number] => 12236120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Method of organizing a programmable atomic unit instruction memory [patent_app_type] => utility [patent_app_number] => 17/870254 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 12037 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870254 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870254
Method of organizing a programmable atomic unit instruction memory Jul 20, 2022 Issued
Array ( [id] => 19362906 [patent_doc_number] => 20240264940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => WRITE DATA CACHE METHOD AND SYSTEM, DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/565053 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18565053 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/565053
Write data cache method and system, device, and storage medium May 25, 2022 Issued
Array ( [id] => 19375383 [patent_doc_number] => 12066948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Dynamic banking and bit separation in memories [patent_app_type] => utility [patent_app_number] => 17/699401 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/699401
Dynamic banking and bit separation in memories Mar 20, 2022 Issued
Array ( [id] => 19293473 [patent_doc_number] => 12032827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Memory devices and systems for host controlled enablement of automatic background operations in a memory device [patent_app_type] => utility [patent_app_number] => 17/692241 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3735 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692241
Memory devices and systems for host controlled enablement of automatic background operations in a memory device Mar 10, 2022 Issued
Array ( [id] => 18584817 [patent_doc_number] => 20230267081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => PERIPHERAL COMPONENT HANDLING OF MEMORY READ REQUESTS [patent_app_type] => utility [patent_app_number] => 17/678174 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10284 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17678174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/678174
Peripheral component handling of memory read requests Feb 22, 2022 Issued
Array ( [id] => 17613687 [patent_doc_number] => 20220155967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => Congestion Mitigation in A Multi-Tiered Distributed Storage System [patent_app_type] => utility [patent_app_number] => 17/667630 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667630
Congestion mitigation in a multi-tiered distributed storage system Feb 8, 2022 Issued
Array ( [id] => 19340617 [patent_doc_number] => 12050808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Selecting a write operation mode from multiple write operation modes [patent_app_type] => utility [patent_app_number] => 17/589451 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589451
Selecting a write operation mode from multiple write operation modes Jan 30, 2022 Issued
Array ( [id] => 19795169 [patent_doc_number] => 12236119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Systems and methods for balancing multiple partitions of non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/648540 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648540
Systems and methods for balancing multiple partitions of non-volatile memory Jan 19, 2022 Issued
Array ( [id] => 18703358 [patent_doc_number] => 11789869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Contention tracking for latency reduction of exclusive operations [patent_app_type] => utility [patent_app_number] => 17/580360 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580360 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580360
Contention tracking for latency reduction of exclusive operations Jan 19, 2022 Issued
Array ( [id] => 17915740 [patent_doc_number] => 20220318136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => I/O Agent [patent_app_type] => utility [patent_app_number] => 17/648071 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648071
I/O agent Jan 13, 2022 Issued
Array ( [id] => 19653488 [patent_doc_number] => 12175281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => PCIe TLP size and alignment management [patent_app_type] => utility [patent_app_number] => 17/569362 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569362 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569362
PCIe TLP size and alignment management Jan 4, 2022 Issued
Array ( [id] => 17551335 [patent_doc_number] => 20220122677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => Programming A Memory Device [patent_app_type] => utility [patent_app_number] => 17/566080 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566080
Programming a memory device Dec 29, 2021 Issued
Array ( [id] => 18873355 [patent_doc_number] => 11861165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Object tiering in a distributed storage system [patent_app_type] => utility [patent_app_number] => 17/646603 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10944 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646603 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646603
Object tiering in a distributed storage system Dec 29, 2021 Issued
Array ( [id] => 18780754 [patent_doc_number] => 11822484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Low power cache [patent_app_type] => utility [patent_app_number] => 17/556257 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5329 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556257
Low power cache Dec 19, 2021 Issued
Array ( [id] => 19198076 [patent_doc_number] => 11995314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Memory management [patent_app_type] => utility [patent_app_number] => 17/543039 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9928 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/543039
Memory management Dec 5, 2021 Issued
Array ( [id] => 17484236 [patent_doc_number] => 20220091740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY DEVICES AND ELECTRONIC SYSTEMS HAVING A HYBRID CACHE INCLUDING STATIC AND DYNAMIC CACHES, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/457615 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457615 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457615
Memory devices and systems including static and dynamic caches, and related methods Dec 2, 2021 Issued
Array ( [id] => 17475759 [patent_doc_number] => 20220083263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => HOST INQUIRY RESPONSE GENERATION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/532020 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532020 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/532020
Host inquiry response generation in a memory device Nov 21, 2021 Issued
Menu