Search

Jason C Olson

Examiner (ID: 1514, Phone: (571)272-7560 , Office: P/3649 )

Most Active Art Unit
2627
Art Unit(s)
OPET, 2688, 2695, 2627, 3649, 2697, 2651
Total Applications
1280
Issued Applications
1069
Pending Applications
5
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 322944 [patent_doc_number] => 07518177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 11/854363 [patent_app_country] => US [patent_app_date] => 2007-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4620 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518177.pdf [firstpage_image] =>[orig_patent_app_number] => 11854363 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854363
Semiconductor storage device Sep 11, 2007 Issued
Array ( [id] => 4914281 [patent_doc_number] => 20080094881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Hybrid Memory Cell for Spin-Polarized Electron Current Induced Switching and Writing/Reading Process Using Such Memory Cell' [patent_app_type] => utility [patent_app_number] => 11/845525 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5316 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094881.pdf [firstpage_image] =>[orig_patent_app_number] => 11845525 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845525
Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such memory cell Aug 26, 2007 Issued
Array ( [id] => 7594608 [patent_doc_number] => 07626855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/892277 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4059 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626855.pdf [firstpage_image] =>[orig_patent_app_number] => 11892277 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/892277
Semiconductor memory device Aug 20, 2007 Issued
Array ( [id] => 5445303 [patent_doc_number] => 20090046529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'Biasing and shielding circuit for source side sensing memory' [patent_app_type] => utility [patent_app_number] => 11/889689 [patent_app_country] => US [patent_app_date] => 2007-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3870 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20090046529.pdf [firstpage_image] =>[orig_patent_app_number] => 11889689 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/889689
Biasing and shielding circuit for source side sensing memory Aug 14, 2007 Issued
Array ( [id] => 125511 [patent_doc_number] => 07706171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Storage device' [patent_app_type] => utility [patent_app_number] => 11/837097 [patent_app_country] => US [patent_app_date] => 2007-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 34 [patent_no_of_words] => 10564 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/706/07706171.pdf [firstpage_image] =>[orig_patent_app_number] => 11837097 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/837097
Storage device Aug 9, 2007 Issued
Array ( [id] => 206432 [patent_doc_number] => 07630275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Latency counter' [patent_app_type] => utility [patent_app_number] => 11/882801 [patent_app_country] => US [patent_app_date] => 2007-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4999 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/630/07630275.pdf [firstpage_image] =>[orig_patent_app_number] => 11882801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882801
Latency counter Aug 5, 2007 Issued
Array ( [id] => 4908411 [patent_doc_number] => 20080019177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'DATA ENCODING APPROACH FOR IMPLEMENTING ROBUST NON-VOLATILE MEMORIES' [patent_app_type] => utility [patent_app_number] => 11/831538 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5006 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20080019177.pdf [firstpage_image] =>[orig_patent_app_number] => 11831538 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/831538
Data encoding approach for implementing robust non-volatile memories Jul 30, 2007 Issued
Array ( [id] => 4725609 [patent_doc_number] => 20080205150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'HYBRID NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/829370 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5918 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20080205150.pdf [firstpage_image] =>[orig_patent_app_number] => 11829370 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829370
Hybrid non-volatile memory Jul 26, 2007 Issued
Array ( [id] => 4458981 [patent_doc_number] => 07894255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-02-22 [patent_title] => 'Thyristor based memory cell' [patent_app_type] => utility [patent_app_number] => 11/881049 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 32 [patent_no_of_words] => 6073 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894255.pdf [firstpage_image] =>[orig_patent_app_number] => 11881049 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881049
Thyristor based memory cell Jul 24, 2007 Issued
Array ( [id] => 289860 [patent_doc_number] => 07548479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Semiconductor memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/822991 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4521 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/548/07548479.pdf [firstpage_image] =>[orig_patent_app_number] => 11822991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/822991
Semiconductor memory device and manufacturing method thereof Jul 10, 2007 Issued
Array ( [id] => 4942938 [patent_doc_number] => 20080080263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Semiconductor memory device and method for operating the same' [patent_app_type] => utility [patent_app_number] => 11/819801 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4894 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20080080263.pdf [firstpage_image] =>[orig_patent_app_number] => 11819801 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819801
Semiconductor memory device and method for operating the same Jun 28, 2007 Issued
Array ( [id] => 264757 [patent_doc_number] => 07570528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'Precharge voltage supply circuit and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/824841 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5610 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/570/07570528.pdf [firstpage_image] =>[orig_patent_app_number] => 11824841 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/824841
Precharge voltage supply circuit and semiconductor device using the same Jun 28, 2007 Issued
Array ( [id] => 5009503 [patent_doc_number] => 20070279981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'NAND-STRUCTURED FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 11/770252 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7489 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20070279981.pdf [firstpage_image] =>[orig_patent_app_number] => 11770252 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770252
Nand-structured flash memory Jun 27, 2007 Issued
Array ( [id] => 5209332 [patent_doc_number] => 20070247916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Systems for Variable Reading in Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 11/770466 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11148 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20070247916.pdf [firstpage_image] =>[orig_patent_app_number] => 11770466 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770466
Systems for variable reading in non-volatile memory Jun 27, 2007 Issued
Array ( [id] => 4823156 [patent_doc_number] => 20080123411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Page buffer for multi-level NAND electrically-programmable semiconductor memories' [patent_app_type] => utility [patent_app_number] => 11/821131 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14637 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20080123411.pdf [firstpage_image] =>[orig_patent_app_number] => 11821131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/821131
Page buffer for multi-level NAND electrically-programmable semiconductor memories Jun 20, 2007 Issued
Array ( [id] => 44970 [patent_doc_number] => 07782653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Semiconductor memory device and method of operating the semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/808991 [patent_app_country] => US [patent_app_date] => 2007-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4082 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782653.pdf [firstpage_image] =>[orig_patent_app_number] => 11808991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808991
Semiconductor memory device and method of operating the semiconductor memory device Jun 13, 2007 Issued
Array ( [id] => 4759458 [patent_doc_number] => 20080311684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Programmable Chip Enable and Chip Address in Semiconductor Memory' [patent_app_type] => utility [patent_app_number] => 11/763287 [patent_app_country] => US [patent_app_date] => 2007-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20080311684.pdf [firstpage_image] =>[orig_patent_app_number] => 11763287 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/763287
Programmable chip enable and chip address in semiconductor memory Jun 13, 2007 Issued
Array ( [id] => 4931688 [patent_doc_number] => 20080002463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Semiconductor device and driving method therefor' [patent_app_type] => utility [patent_app_number] => 11/808821 [patent_app_country] => US [patent_app_date] => 2007-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7921 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20080002463.pdf [firstpage_image] =>[orig_patent_app_number] => 11808821 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808821
Semiconductor device and driving method therefor Jun 12, 2007 Issued
Array ( [id] => 592048 [patent_doc_number] => 07450428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Reading circuit and method for a nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 11/811394 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4680 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450428.pdf [firstpage_image] =>[orig_patent_app_number] => 11811394 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/811394
Reading circuit and method for a nonvolatile memory device Jun 7, 2007 Issued
Array ( [id] => 237052 [patent_doc_number] => 07596036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Memory control circuit, microcomputer, and data rewriting method' [patent_app_type] => utility [patent_app_number] => 11/808063 [patent_app_country] => US [patent_app_date] => 2007-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/596/07596036.pdf [firstpage_image] =>[orig_patent_app_number] => 11808063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808063
Memory control circuit, microcomputer, and data rewriting method Jun 5, 2007 Issued
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