Search

Jason C Olson

Examiner (ID: 1514, Phone: (571)272-7560 , Office: P/3649 )

Most Active Art Unit
2627
Art Unit(s)
OPET, 2688, 2695, 2627, 3649, 2697, 2651
Total Applications
1280
Issued Applications
1069
Pending Applications
5
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 597339 [patent_doc_number] => 07436710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well' [patent_app_type] => utility [patent_app_number] => 11/685111 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6994 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/436/07436710.pdf [firstpage_image] =>[orig_patent_app_number] => 11685111 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/685111
EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well Mar 11, 2007 Issued
Array ( [id] => 7590406 [patent_doc_number] => 07663953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Method for high speed sensing for extra low voltage DRAM' [patent_app_type] => utility [patent_app_number] => 11/684811 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4913 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663953.pdf [firstpage_image] =>[orig_patent_app_number] => 11684811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684811
Method for high speed sensing for extra low voltage DRAM Mar 11, 2007 Issued
Array ( [id] => 7589202 [patent_doc_number] => 07663908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Method for increasing retention time in DRAM' [patent_app_type] => utility [patent_app_number] => 11/684803 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4477 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663908.pdf [firstpage_image] =>[orig_patent_app_number] => 11684803 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684803
Method for increasing retention time in DRAM Mar 11, 2007 Issued
Array ( [id] => 134067 [patent_doc_number] => 07701778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/684035 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5961 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701778.pdf [firstpage_image] =>[orig_patent_app_number] => 11684035 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684035
Nonvolatile semiconductor memory device Mar 8, 2007 Issued
Array ( [id] => 5257879 [patent_doc_number] => 20070211511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'READ-ONLY MEMORY USING LINEAR PASSIVE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/678109 [patent_app_country] => US [patent_app_date] => 2007-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3767 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20070211511.pdf [firstpage_image] =>[orig_patent_app_number] => 11678109 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/678109
Read-only memory using linear passive elements Feb 22, 2007 Issued
Array ( [id] => 66480 [patent_doc_number] => 07760570 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-20 [patent_title] => 'Semiconductor device having variable parameter selection based on temperature and test method' [patent_app_type] => utility [patent_app_number] => 11/708733 [patent_app_country] => US [patent_app_date] => 2007-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 13533 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/760/07760570.pdf [firstpage_image] =>[orig_patent_app_number] => 11708733 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/708733
Semiconductor device having variable parameter selection based on temperature and test method Feb 20, 2007 Issued
Array ( [id] => 5110918 [patent_doc_number] => 20070194833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'MEMORY CELL STRUCTURE OF SRAM' [patent_app_type] => utility [patent_app_number] => 11/676821 [patent_app_country] => US [patent_app_date] => 2007-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5563 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194833.pdf [firstpage_image] =>[orig_patent_app_number] => 11676821 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676821
Memory cell structure of SRAM Feb 19, 2007 Issued
Array ( [id] => 179002 [patent_doc_number] => 07656713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Non-volatile memory read operations using compensation currents' [patent_app_type] => utility [patent_app_number] => 11/675545 [patent_app_country] => US [patent_app_date] => 2007-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 23996 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656713.pdf [firstpage_image] =>[orig_patent_app_number] => 11675545 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/675545
Non-volatile memory read operations using compensation currents Feb 14, 2007 Issued
Array ( [id] => 854720 [patent_doc_number] => 07379343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Time-dependent compensation currents in non-volatile memory read operations' [patent_app_type] => utility [patent_app_number] => 11/675551 [patent_app_country] => US [patent_app_date] => 2007-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 23979 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/379/07379343.pdf [firstpage_image] =>[orig_patent_app_number] => 11675551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/675551
Time-dependent compensation currents in non-volatile memory read operations Feb 14, 2007 Issued
Array ( [id] => 5111669 [patent_doc_number] => 20070195584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/672227 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3958 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20070195584.pdf [firstpage_image] =>[orig_patent_app_number] => 11672227 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/672227
Semiconductor memory device Feb 6, 2007 Issued
Array ( [id] => 349820 [patent_doc_number] => 07495943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/655945 [patent_app_country] => US [patent_app_date] => 2007-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 66 [patent_no_of_words] => 20502 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/495/07495943.pdf [firstpage_image] =>[orig_patent_app_number] => 11655945 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/655945
Semiconductor memory device Jan 21, 2007 Issued
Array ( [id] => 4763857 [patent_doc_number] => 20080175068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'TEMPERATURE DEPENDENT BACK-BIAS FOR A MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 11/624355 [patent_app_country] => US [patent_app_date] => 2007-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4897 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20080175068.pdf [firstpage_image] =>[orig_patent_app_number] => 11624355 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/624355
Temperature dependent back-bias for a memory array Jan 17, 2007 Issued
Array ( [id] => 4969871 [patent_doc_number] => 20070109873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Non-volatile memory device having controlled bulk voltage and method of programming same' [patent_app_type] => utility [patent_app_number] => 11/649815 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4151 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20070109873.pdf [firstpage_image] =>[orig_patent_app_number] => 11649815 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649815
Non-volatile memory device having controlled bulk voltage and method of programming same Jan 4, 2007 Abandoned
Array ( [id] => 5084071 [patent_doc_number] => 20070274122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Memory device having open bit line structure and method of sensing data therefrom' [patent_app_type] => utility [patent_app_number] => 11/649273 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4932 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20070274122.pdf [firstpage_image] =>[orig_patent_app_number] => 11649273 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649273
Memory device having open bit line structure and method of sensing data therefrom Jan 3, 2007 Issued
Array ( [id] => 4750857 [patent_doc_number] => 20080158928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'TECHNIQUE FOR CAM WIDTH EXPANSION USING AN EXTERNAL PRIORITY ENCODER' [patent_app_type] => utility [patent_app_number] => 11/617771 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3392 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20080158928.pdf [firstpage_image] =>[orig_patent_app_number] => 11617771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/617771
Technique for CAM width expansion using an external priority encoder Dec 28, 2006 Issued
Array ( [id] => 135451 [patent_doc_number] => 07697346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Data input/output circuit and method of semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 11/647394 [patent_app_country] => US [patent_app_date] => 2006-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5469 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/697/07697346.pdf [firstpage_image] =>[orig_patent_app_number] => 11647394 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647394
Data input/output circuit and method of semiconductor memory apparatus Dec 28, 2006 Issued
Array ( [id] => 315852 [patent_doc_number] => 07525830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Nonvolatile ferroelectric perpendicular electrode cell, FeRAM having the cell and method for manufacturing the cell' [patent_app_type] => utility [patent_app_number] => 11/641840 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5727 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/525/07525830.pdf [firstpage_image] =>[orig_patent_app_number] => 11641840 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641840
Nonvolatile ferroelectric perpendicular electrode cell, FeRAM having the cell and method for manufacturing the cell Dec 19, 2006 Issued
Array ( [id] => 4878236 [patent_doc_number] => 20080151619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'METHOD AND APPARATUS FOR ADAPTIVE MEMORY CELL OVERERASE COMPENSATION' [patent_app_type] => utility [patent_app_number] => 11/613379 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151619.pdf [firstpage_image] =>[orig_patent_app_number] => 11613379 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/613379
Method and apparatus for adaptive memory cell overerase compensation Dec 19, 2006 Issued
Array ( [id] => 4881802 [patent_doc_number] => 20080155185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/613325 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5236 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20080155185.pdf [firstpage_image] =>[orig_patent_app_number] => 11613325 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/613325
Hybrid solid-state memory system having volatile and non-volatile memory Dec 19, 2006 Issued
Array ( [id] => 4866892 [patent_doc_number] => 20080145951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'High density spin torque three dimensional (3D) memory arrays addressed with microwave current' [patent_app_type] => utility [patent_app_number] => 11/642277 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7617 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20080145951.pdf [firstpage_image] =>[orig_patent_app_number] => 11642277 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/642277
High density spin torque three dimensional (3D) memory arrays addressed with microwave current Dec 18, 2006 Issued
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