Jason H Johnsen
Examiner (ID: 12437)
| Most Active Art Unit | |
| Art Unit(s) | |
| Total Applications | |
| Issued Applications | |
| Pending Applications | |
| Abandoned Applications |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 90/011754 | SHARING NON-SHARABLE DEVICES BETWEEN AN EMBEDDED CONTROLLER AND A PROCESSOR IN A COMPUTER SYSTEM | Jun 20, 2011 | Issued |
| 95/001657 | Enhanced Transaction Resolution Techniques | Jun 13, 2011 | Issued |
| 95/001612 | INTERNET PROCUREMENT METHOD | Apr 27, 2011 | Issued |
| 90/011636 | Enhanced Transaction Resolution Techniques | Apr 7, 2011 | Issued |
| 95/000579 | MEMORY MODULE DECODER | Oct 20, 2010 | Issued |
| 95/000577 | MEMORY MODULE DECODER | Oct 19, 2010 | Issued |
| 95/000578 | MEMORY MODULE DECODER | Oct 19, 2010 | Issued |
| 90/011087 | I/O and Memory Bus System for DFPS and Units with Two or Multi-Dimensional Programmable Cell Architectures | Jul 7, 2010 | Issued |
| 95/001381 | MEMORY MODULE WITH A CIRCUIT PROVIDING LOAD ISOLATION AND MEMORY DOMAIN TRANSLATION | Jun 8, 2010 | Issued |
| 12/797350 | OUTPUT BUFFER HAVING INHERENTLY PRECISE DATA MASKING | Jun 8, 2010 | Abandoned |
| 95/001339 | MEMORY MODULE DECODER | Jun 7, 2010 | Issued |
| 95/001337 | MEMORY MODULE WITH A CIRCUIT PROVIDING LOAD ISOLATION AND MEMORY DOMAIN TRANSLATION | Jun 3, 2010 | Issued |
| 95/000546 | MEMORY MODULE DECODER | May 10, 2010 | Issued |
| 90/010979 | I/O AND MEMORY BUS SYSTEM FOR DFPS AND UNITS WITH TWO OR MULTI-DIMENSIONAL PROGRAMMABLE CELL ARCHITECTURES | May 3, 2010 | Issued |
| 90/009628 | METHOD AND DEVICE FOR COUNTING AND MEASURING PARTICLES | Nov 1, 2009 | Issued |
| 95/000501 | SINGLE WIRE SERIAL INTERFACE UTILIZING COUNT OF ENCODED CLOCK PULSES WITH RESET | Oct 2, 2009 | Issued |
| 90/009587 | SYSTEM AND METHOD FOR AUTOMATIC CRITICAL EVENT NOTIFICATION | Sep 24, 2009 | Issued |
| 90/010641 | Document Information Retrieval Using Global Word Co-Occurrence Patterns | Sep 22, 2009 | Issued |
| 90/009457 | HIGH PERFORMANCE MICROPROCESSOR HAVING VARIABLE SPEED SYSTEM CLOCK | Aug 23, 2009 | Issued |
| 90/010628 | COMPUTER INTERCONNECTION SYSTEM | Jul 29, 2009 | Issued |