Jason Karol Niesz

Array ( [id] => 4024019 [patent_doc_number] => 05890013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Paged memory architecture for a single chip multi-processor with physical memory pages that are swapped without latency' [patent_app_type] => 1 [patent_app_number] => 8/723395 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2382 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/890/05890013.pdf [firstpage_image] =>[orig_patent_app_number] => 723395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4272841 [patent_doc_number] => 06209020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Distributed pipeline memory architecture for a computer system with even and odd pids' [patent_app_type] => 1 [patent_app_number] => 8/716989 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9013 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209020.pdf [firstpage_image] =>[orig_patent_app_number] => 716989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3794053 [patent_doc_number] => 05809260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Burst mode data transmission retry of previously aborted block transfer of data' [patent_app_type] => 1 [patent_app_number] => 8/716011 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5681 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809260.pdf [firstpage_image] =>[orig_patent_app_number] => 716011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4223014 [patent_doc_number] => 06078936 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Presenting an image on a display as it would be presented by another image output device or on printing circuitry' [patent_app_type] => 1 [patent_app_number] => 8/679169 [patent_app_country] => US [patent_app_date] => 1996-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 11445 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078936.pdf [firstpage_image] =>[orig_patent_app_number] => 679169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191929 [patent_doc_number] => 06141692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Directory-based, shared-memory, scaleable multiprocessor computer system having deadlock-free transaction flow sans flow control protocol' [patent_app_type] => 1 [patent_app_number] => 8/674358 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6955 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141692.pdf [firstpage_image] =>[orig_patent_app_number] => 674358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4057348 [patent_doc_number] => 05909588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Processor architecture with divisional signal in instruction decode for parallel storing of variable bit-width results in separate memory locations' [patent_app_type] => 1 [patent_app_number] => 8/671619 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 10555 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909588.pdf [firstpage_image] =>[orig_patent_app_number] => 671619 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4059864 [patent_doc_number] => 05875482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Method and apparatus for programmable chip select negation in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/660620 [patent_app_country] => US [patent_app_date] => 1996-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6152 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875482.pdf [firstpage_image] =>[orig_patent_app_number] => 660620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7639404 [patent_doc_number] => 06396513 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Electronic message sorting and notification system' [patent_app_type] => B1 [patent_app_number] => 08/645740 [patent_app_country] => US [patent_app_date] => 1996-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4858 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396513.pdf [firstpage_image] =>[orig_patent_app_number] => 08645740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3919273 [patent_doc_number] => 05898889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Qualified burst cache for transfer of data between disparate clock domains' [patent_app_type] => 1 [patent_app_number] => 8/641401 [patent_app_country] => US [patent_app_date] => 1996-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3287 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898889.pdf [firstpage_image] =>[orig_patent_app_number] => 641401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4030760 [patent_doc_number] => 05881236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'System for installation of software on a remote computer system over a network using checksums and password protection' [patent_app_type] => 1 [patent_app_number] => 8/639160 [patent_app_country] => US [patent_app_date] => 1996-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3945 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881236.pdf [firstpage_image] =>[orig_patent_app_number] => 639160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3897233 [patent_doc_number] => 05805840 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Bus arbiter employing a transaction grading mechanism to dynamically vary arbitration priority' [patent_app_type] => 1 [patent_app_number] => 8/621959 [patent_app_country] => US [patent_app_date] => 1996-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3259 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805840.pdf [firstpage_image] =>[orig_patent_app_number] => 621959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3965674 [patent_doc_number] => 05956494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Method, apparatus, and computer instruction for enabling gain control in a digital signal processor' [patent_app_type] => 1 [patent_app_number] => 8/619787 [patent_app_country] => US [patent_app_date] => 1996-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2750 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956494.pdf [firstpage_image] =>[orig_patent_app_number] => 619787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4113246 [patent_doc_number] => 06100882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Textual recording of contributions to audio conference using speech recognition' [patent_app_type] => 1 [patent_app_number] => 8/369022 [patent_app_country] => US [patent_app_date] => 1995-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5103 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100882.pdf [firstpage_image] =>[orig_patent_app_number] => 369022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4167879 [patent_doc_number] => 06115053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Computer animation method and system for synthesizing human-like gestures and actions' [patent_app_type] => 1 [patent_app_number] => 8/284799 [patent_app_country] => US [patent_app_date] => 1994-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4430 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115053.pdf [firstpage_image] =>[orig_patent_app_number] => 284799 [rel_patent_id] =>[rel_patent_doc_number] =>)