
Jason Lappas
Examiner (ID: 3968, Phone: (571)270-1272 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 1390 |
| Issued Applications | 1293 |
| Pending Applications | 55 |
| Abandoned Applications | 64 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13451271
[patent_doc_number] => 20180277178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-27
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/653026
[patent_app_country] => US
[patent_app_date] => 2017-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6545
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15653026
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/653026 | Semiconductor device | Jul 17, 2017 | Issued |
Array
(
[id] => 13723655
[patent_doc_number] => 20170372783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-28
[patent_title] => DEVICE AND METHOD FOR GENERATING RANDOM NUMBERS
[patent_app_type] => utility
[patent_app_number] => 15/648771
[patent_app_country] => US
[patent_app_date] => 2017-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648771
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/648771 | Device and method for generating random numbers | Jul 12, 2017 | Issued |
Array
(
[id] => 12027485
[patent_doc_number] => 20170317585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'APPARATUSES AND METHODS FOR MIXED CHARGE PUMPS WITH VOLTAGE REGULATOR CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 15/640959
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4935
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640959
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640959 | Apparatuses and methods for mixed charge pumps with voltage regulator circuits | Jul 2, 2017 | Issued |
Array
(
[id] => 13132071
[patent_doc_number] => 10083975
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-25
[patent_title] => Control voltage searching method for non-volatile memory
[patent_app_type] => utility
[patent_app_number] => 15/631444
[patent_app_country] => US
[patent_app_date] => 2017-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 6842
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15631444
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/631444 | Control voltage searching method for non-volatile memory | Jun 22, 2017 | Issued |
Array
(
[id] => 12800008
[patent_doc_number] => 20180158505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-07
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/631054
[patent_app_country] => US
[patent_app_date] => 2017-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12556
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15631054
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/631054 | Semiconductor memory device and method for operating the same | Jun 22, 2017 | Issued |
Array
(
[id] => 13740131
[patent_doc_number] => 20180374535
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-12-27
[patent_title] => Memristive Device Based on Reversible Intercalated Ion Transfer Between Two Meta-Stable Phases
[patent_app_type] => utility
[patent_app_number] => 15/630681
[patent_app_country] => US
[patent_app_date] => 2017-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4070
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630681
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/630681 | Memristive device based on reversible intercalated ion transfer between two meta-stable phases | Jun 21, 2017 | Issued |
Array
(
[id] => 12778186
[patent_doc_number] => 20180151230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/623466
[patent_app_country] => US
[patent_app_date] => 2017-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6992
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623466
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/623466 | Semiconductor memory device and operating method thereof | Jun 14, 2017 | Issued |
Array
(
[id] => 11959169
[patent_doc_number] => 20170263321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'NONVOLATILE MEMORY DEVICE AND DATA STORAGE DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/609540
[patent_app_country] => US
[patent_app_date] => 2017-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8164
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609540
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/609540 | Nonvolatile memory device and data storage device including the same | May 30, 2017 | Issued |
Array
(
[id] => 12195799
[patent_doc_number] => 09899538
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-02-20
[patent_title] => 'Non-volatile memory device and operation method thereof'
[patent_app_type] => utility
[patent_app_number] => 15/591126
[patent_app_country] => US
[patent_app_date] => 2017-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3173
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15591126
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/591126 | Non-volatile memory device and operation method thereof | May 9, 2017 | Issued |
Array
(
[id] => 13558455
[patent_doc_number] => 20180330775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-15
[patent_title] => APPARATUSES AND METHODS FOR CONFIGURABLE COMMAND AND DATA INPUT CIRCUITS FOR SEMICONDUCTOR MEMORIES
[patent_app_type] => utility
[patent_app_number] => 15/590972
[patent_app_country] => US
[patent_app_date] => 2017-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10725
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15590972
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/590972 | Apparatuses and methods for configurable command and data input circuits for semiconductor memories | May 8, 2017 | Issued |
Array
(
[id] => 12060805
[patent_doc_number] => 20170337149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-23
[patent_title] => 'SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/590406
[patent_app_country] => US
[patent_app_date] => 2017-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 16989
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15590406
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/590406 | Semiconductor device, electronic component, and electronic device | May 8, 2017 | Issued |
Array
(
[id] => 13008591
[patent_doc_number] => 10027984
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-17
[patent_title] => Methods and systems for efficiently reading a data block from a data seglet with compressed data blocks
[patent_app_type] => utility
[patent_app_number] => 15/590438
[patent_app_country] => US
[patent_app_date] => 2017-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6460
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15590438
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/590438 | Methods and systems for efficiently reading a data block from a data seglet with compressed data blocks | May 8, 2017 | Issued |
Array
(
[id] => 13542763
[patent_doc_number] => 20180322928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => LOOP CONTROL STROBE SKEW
[patent_app_type] => utility
[patent_app_number] => 15/589120
[patent_app_country] => US
[patent_app_date] => 2017-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15817
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589120
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/589120 | Loop control strobe skew | May 7, 2017 | Issued |
Array
(
[id] => 12649704
[patent_doc_number] => 20180108399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-04-19
[patent_title] => DATA SENSE AMPLIFICATION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/589056
[patent_app_country] => US
[patent_app_date] => 2017-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589056
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/589056 | Data sense amplification circuit and semiconductor memory device including the same | May 7, 2017 | Issued |
Array
(
[id] => 13320331
[patent_doc_number] => 20180211703
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-26
[patent_title] => HIGH-DENSITY 3D VERTICAL RERAM WITH BIDIRECTIONAL THRESHOLD-TYPE SELECTOR
[patent_app_type] => utility
[patent_app_number] => 15/588422
[patent_app_country] => US
[patent_app_date] => 2017-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9015
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588422
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/588422 | HIGH-DENSITY 3D VERTICAL RERAM WITH BIDIRECTIONAL THRESHOLD-TYPE SELECTOR | May 4, 2017 | Abandoned |
Array
(
[id] => 13723641
[patent_doc_number] => 20170372776
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-28
[patent_title] => SEMICONDUCTOR DEVICES, CIRCUITS AND METHODS FOR READ AND/OR WRITE ASSIST OF AN SRAM CIRCUIT PORTION BASED ON VOLTAGE DETECTION AND/OR TEMPERATURE DETECTION CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 15/587938
[patent_app_country] => US
[patent_app_date] => 2017-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17246
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587938
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/587938 | Semiconductor devices, circuits and methods for read and/or write assist of an SRAM circuit portion based on voltage detection and/or temperature detection circuits | May 4, 2017 | Issued |
Array
(
[id] => 12223120
[patent_doc_number] => 20180061479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-01
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/587486
[patent_app_country] => US
[patent_app_date] => 2017-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9660
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587486
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/587486 | Semiconductor memory device and operating method thereof | May 4, 2017 | Issued |
Array
(
[id] => 13256741
[patent_doc_number] => 10141064
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-11-27
[patent_title] => Prevention of neighboring plane disturb in non-volatile memory
[patent_app_type] => utility
[patent_app_number] => 15/585680
[patent_app_country] => US
[patent_app_date] => 2017-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7613
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585680
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/585680 | Prevention of neighboring plane disturb in non-volatile memory | May 2, 2017 | Issued |
Array
(
[id] => 13514003
[patent_doc_number] => 20180308544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-25
[patent_title] => SRAM BITLINE EQUALIZATION USING PHASE CHANGE MATERIAL
[patent_app_type] => utility
[patent_app_number] => 15/496114
[patent_app_country] => US
[patent_app_date] => 2017-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5687
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15496114
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/496114 | SRAM bitline equalization using phase change material | Apr 24, 2017 | Issued |
Array
(
[id] => 12147416
[patent_doc_number] => 09881673
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-30
[patent_title] => 'Memories having a shared resistance variable material'
[patent_app_type] => utility
[patent_app_number] => 15/488828
[patent_app_country] => US
[patent_app_date] => 2017-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3798
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15488828
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/488828 | Memories having a shared resistance variable material | Apr 16, 2017 | Issued |