
Jason M. Sims
Examiner (ID: 294, Phone: (571)272-7540 , Office: P/1631 )
| Most Active Art Unit | 1631 |
| Art Unit(s) | 3791, IPBS, 1631 |
| Total Applications | 487 |
| Issued Applications | 174 |
| Pending Applications | 52 |
| Abandoned Applications | 273 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1002690
[patent_doc_number] => 06909147
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-21
[patent_title] => 'Multi-height FinFETS'
[patent_app_type] => utility
[patent_app_number] => 10/249738
[patent_app_country] => US
[patent_app_date] => 2003-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3498
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/909/06909147.pdf
[firstpage_image] =>[orig_patent_app_number] => 10249738
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/249738 | Multi-height FinFETS | May 4, 2003 | Issued |
Array
(
[id] => 833819
[patent_doc_number] => 07397110
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-08
[patent_title] => 'High resistance silicon wafer and its manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 10/512405
[patent_app_country] => US
[patent_app_date] => 2003-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 16040
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/397/07397110.pdf
[firstpage_image] =>[orig_patent_app_number] => 10512405
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/512405 | High resistance silicon wafer and its manufacturing method | Apr 15, 2003 | Issued |
Array
(
[id] => 6725215
[patent_doc_number] => 20030207527
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-06
[patent_title] => 'Flash memory array structure and method of forming'
[patent_app_type] => new
[patent_app_number] => 10/411451
[patent_app_country] => US
[patent_app_date] => 2003-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2209
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0207/20030207527.pdf
[firstpage_image] =>[orig_patent_app_number] => 10411451
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/411451 | Flash memory array structure and method of forming | Apr 9, 2003 | Issued |
Array
(
[id] => 7675086
[patent_doc_number] => 20040127032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'Process for cleaning silicon surface and fabrication of thin film transistor by the process'
[patent_app_type] => new
[patent_app_number] => 10/409985
[patent_app_country] => US
[patent_app_date] => 2003-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2345
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20040127032.pdf
[firstpage_image] =>[orig_patent_app_number] => 10409985
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/409985 | Process for cleaning silicon surface and fabrication of thin film transistor by the process | Apr 7, 2003 | Issued |
Array
(
[id] => 6610595
[patent_doc_number] => 20030209714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-13
[patent_title] => 'Solid state lighting device with reduced form factor including led with directional emission and package with microoptics'
[patent_app_type] => new
[patent_app_number] => 10/401686
[patent_app_country] => US
[patent_app_date] => 2003-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7957
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20030209714.pdf
[firstpage_image] =>[orig_patent_app_number] => 10401686
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/401686 | Solid state lighting device with reduced form factor including LED with directional emission and package with microoptics | Mar 30, 2003 | Issued |
Array
(
[id] => 7309376
[patent_doc_number] => 20040142578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'Thin film nanostructures'
[patent_app_type] => new
[patent_app_number] => 10/400075
[patent_app_country] => US
[patent_app_date] => 2003-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2605
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0142/20040142578.pdf
[firstpage_image] =>[orig_patent_app_number] => 10400075
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/400075 | Thin film nanostructures | Mar 26, 2003 | Abandoned |
Array
(
[id] => 6710709
[patent_doc_number] => 20030170458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-11
[patent_title] => 'Base material for forming diamond film and diamond film'
[patent_app_type] => new
[patent_app_number] => 10/385986
[patent_app_country] => US
[patent_app_date] => 2003-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3884
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0170/20030170458.pdf
[firstpage_image] =>[orig_patent_app_number] => 10385986
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/385986 | Base material for forming diamond film and diamond film | Mar 10, 2003 | Abandoned |
Array
(
[id] => 7609865
[patent_doc_number] => 06998322
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'Methods of fabricating high voltage, high temperature capacitor and interconnection structures'
[patent_app_type] => utility
[patent_app_number] => 10/382826
[patent_app_country] => US
[patent_app_date] => 2003-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 11591
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/998/06998322.pdf
[firstpage_image] =>[orig_patent_app_number] => 10382826
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/382826 | Methods of fabricating high voltage, high temperature capacitor and interconnection structures | Mar 5, 2003 | Issued |
Array
(
[id] => 7383480
[patent_doc_number] => 20040029348
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-12
[patent_title] => 'Method for forming silicide wires in a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/378705
[patent_app_country] => US
[patent_app_date] => 2003-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2358
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0029/20040029348.pdf
[firstpage_image] =>[orig_patent_app_number] => 10378705
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/378705 | Method for forming silicide wires in a semiconductor device | Mar 3, 2003 | Issued |
Array
(
[id] => 651283
[patent_doc_number] => 07112860
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-26
[patent_title] => 'Integrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devices'
[patent_app_type] => utility
[patent_app_number] => 10/378331
[patent_app_country] => US
[patent_app_date] => 2003-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 17
[patent_no_of_words] => 7477
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/112/07112860.pdf
[firstpage_image] =>[orig_patent_app_number] => 10378331
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/378331 | Integrated nitride-based acoustic wave devices and methods of fabricating integrated nitride-based acoustic wave devices | Mar 2, 2003 | Issued |
Array
(
[id] => 6841852
[patent_doc_number] => 20030147199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-07
[patent_title] => 'Cylinder-type capacitor for a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/375385
[patent_app_country] => US
[patent_app_date] => 2003-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5764
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0147/20030147199.pdf
[firstpage_image] =>[orig_patent_app_number] => 10375385
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/375385 | Cylinder-type capacitor for a semiconductor device | Feb 26, 2003 | Abandoned |
Array
(
[id] => 7150070
[patent_doc_number] => 20040171180
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'Monitoring of VCSEL output power with photodiodes'
[patent_app_type] => new
[patent_app_number] => 10/376202
[patent_app_country] => US
[patent_app_date] => 2003-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2459
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20040171180.pdf
[firstpage_image] =>[orig_patent_app_number] => 10376202
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/376202 | Monitoring of VCSEL output power with photodiodes | Feb 26, 2003 | Abandoned |
Array
(
[id] => 1126598
[patent_doc_number] => 06790740
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-14
[patent_title] => 'Process for filling polysilicon seam'
[patent_app_type] => B2
[patent_app_number] => 10/375485
[patent_app_country] => US
[patent_app_date] => 2003-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 2689
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/790/06790740.pdf
[firstpage_image] =>[orig_patent_app_number] => 10375485
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/375485 | Process for filling polysilicon seam | Feb 26, 2003 | Issued |
Array
(
[id] => 1037837
[patent_doc_number] => 06872989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-29
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/370766
[patent_app_country] => US
[patent_app_date] => 2003-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 42
[patent_no_of_words] => 18358
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 538
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/872/06872989.pdf
[firstpage_image] =>[orig_patent_app_number] => 10370766
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/370766 | Semiconductor device and method for fabricating the same | Feb 23, 2003 | Issued |
Array
(
[id] => 6740422
[patent_doc_number] => 20030157791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-21
[patent_title] => 'Process of fabricating bumps'
[patent_app_type] => new
[patent_app_number] => 10/372546
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3006
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20030157791.pdf
[firstpage_image] =>[orig_patent_app_number] => 10372546
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/372546 | Process of fabricating bumps | Feb 20, 2003 | Abandoned |
Array
(
[id] => 935636
[patent_doc_number] => 06974986
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-13
[patent_title] => 'Semiconductor memory device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/367853
[patent_app_country] => US
[patent_app_date] => 2003-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 9613
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/974/06974986.pdf
[firstpage_image] =>[orig_patent_app_number] => 10367853
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/367853 | Semiconductor memory device and method of manufacturing the same | Feb 18, 2003 | Issued |
Array
(
[id] => 766094
[patent_doc_number] => 07008804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-07
[patent_title] => 'Methods for compensating for a test temperature deviation'
[patent_app_type] => utility
[patent_app_number] => 10/366576
[patent_app_country] => US
[patent_app_date] => 2003-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4353
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/008/07008804.pdf
[firstpage_image] =>[orig_patent_app_number] => 10366576
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/366576 | Methods for compensating for a test temperature deviation | Feb 13, 2003 | Issued |
Array
(
[id] => 1025508
[patent_doc_number] => 06885063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => 'Semiconductor device having an SEB voltage suitable for use in space'
[patent_app_type] => utility
[patent_app_number] => 10/366946
[patent_app_country] => US
[patent_app_date] => 2003-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 5550
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 410
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/885/06885063.pdf
[firstpage_image] =>[orig_patent_app_number] => 10366946
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/366946 | Semiconductor device having an SEB voltage suitable for use in space | Feb 13, 2003 | Issued |
Array
(
[id] => 6797186
[patent_doc_number] => 20030176060
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Methods For Treating Pluralities Of Discrete Semiconductor Substrates'
[patent_app_type] => new
[patent_app_number] => 10/349808
[patent_app_country] => US
[patent_app_date] => 2003-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6395
[patent_no_of_claims] => 81
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20030176060.pdf
[firstpage_image] =>[orig_patent_app_number] => 10349808
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/349808 | Methods for treating pluralities of discrete semiconductor substrates | Jan 21, 2003 | Issued |
Array
(
[id] => 6785521
[patent_doc_number] => 20030136760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Method of fabrication to sharpen corners of Y-branches in integrated optical components and other micro-devices'
[patent_app_type] => new
[patent_app_number] => 10/338435
[patent_app_country] => US
[patent_app_date] => 2003-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2567
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20030136760.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338435
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338435 | Method of fabrication to sharpen corners of Y-branches in integrated optical components and other micro-devices | Jan 7, 2003 | Issued |