Search

Jason S Morrow

Examiner (ID: 17033, Phone: (571)272-6663 , Office: P/3612 )

Most Active Art Unit
3612
Art Unit(s)
3612
Total Applications
2528
Issued Applications
2072
Pending Applications
145
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13992291 [patent_doc_number] => 20190065303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => PROCESSOR ANALYSIS [patent_app_type] => utility [patent_app_number] => 15/693308 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693308
PROCESSOR ANALYSIS Aug 30, 2017 Abandoned
Array ( [id] => 17758534 [patent_doc_number] => 11398837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Unified pattern for puncturing and shortening polar codes [patent_app_type] => utility [patent_app_number] => 16/636499 [patent_app_country] => US [patent_app_date] => 2017-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 12966 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16636499 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/636499
Unified pattern for puncturing and shortening polar codes Aug 11, 2017 Issued
Array ( [id] => 13581511 [patent_doc_number] => 20180342304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => SYSTEM AND METHOD FOR STRING-BASED ERASE VERIFY TO CREATE PARTIAL GOOD BLOCKS [patent_app_type] => utility [patent_app_number] => 15/606931 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606931 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606931
System and method for string-based erase verify to create partial good blocks May 25, 2017 Issued
Array ( [id] => 15171453 [patent_doc_number] => 10491243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Deep learning for low-density parity-check (LDPC) decoding [patent_app_type] => utility [patent_app_number] => 15/607242 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607242
Deep learning for low-density parity-check (LDPC) decoding May 25, 2017 Issued
Array ( [id] => 14860561 [patent_doc_number] => 10419024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Early termination of low-density parity-check (LDPC) decoding [patent_app_type] => utility [patent_app_number] => 15/607260 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607260 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607260
Early termination of low-density parity-check (LDPC) decoding May 25, 2017 Issued
Array ( [id] => 16463886 [patent_doc_number] => 10847243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Methods of testing cell arrays and semiconductor devices executing the same [patent_app_type] => utility [patent_app_number] => 15/605009 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5067 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605009 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605009
Methods of testing cell arrays and semiconductor devices executing the same May 24, 2017 Issued
Array ( [id] => 16979076 [patent_doc_number] => 20210223313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => ERROR DETECTION ON INTEGRATED CIRCUIT INPUT/OUTPUT PINS [patent_app_type] => utility [patent_app_number] => 16/305197 [patent_app_country] => US [patent_app_date] => 2017-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16305197 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/305197
Error detection on integrated circuit input/output pins May 22, 2017 Issued
Array ( [id] => 18705412 [patent_doc_number] => 11791934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Communication device, communication method, program, and communication system [patent_app_type] => utility [patent_app_number] => 16/092240 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16092240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/092240
Communication device, communication method, program, and communication system May 1, 2017 Issued
Array ( [id] => 11653624 [patent_doc_number] => 20170149530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'LOW DENSITY PARITY CHECK ENCODER, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/426913 [patent_app_country] => US [patent_app_date] => 2017-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11601 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15426913 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/426913
Low density parity check encoder, and low density parity check encoding method using the same Feb 6, 2017 Issued
Array ( [id] => 11652628 [patent_doc_number] => 20170148530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'MANUFACTURER SELF-TEST FOR SOLID-STATE DRIVES' [patent_app_type] => utility [patent_app_number] => 15/423692 [patent_app_country] => US [patent_app_date] => 2017-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15423692 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/423692
Manufacturer self-test for solid-state drives Feb 2, 2017 Issued
Array ( [id] => 11630649 [patent_doc_number] => 20170140838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'SCAN COMPRESSION ARCHITECTURE FOR HIGHLY COMPRESSED DESIGNS AND ASSOCIATED METHODS' [patent_app_type] => utility [patent_app_number] => 15/420720 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15420720 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/420720
Scan compression architecture for highly compressed designs and associated methods Jan 30, 2017 Issued
Array ( [id] => 16654206 [patent_doc_number] => 10931405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Relaying method and device and destination with feedback in an OMAMRC system [patent_app_type] => utility [patent_app_number] => 16/061234 [patent_app_country] => US [patent_app_date] => 2016-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 8254 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16061234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/061234
Relaying method and device and destination with feedback in an OMAMRC system Dec 8, 2016 Issued
Array ( [id] => 11533447 [patent_doc_number] => 20170093427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'SYSTEMS AND METHODS FOR SOFT DATA UTILIZATION IN A SOLID STATE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/373152 [patent_app_country] => US [patent_app_date] => 2016-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15373152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/373152
SYSTEMS AND METHODS FOR SOFT DATA UTILIZATION IN A SOLID STATE MEMORY SYSTEM Dec 7, 2016 Abandoned
Array ( [id] => 16132061 [patent_doc_number] => 10699798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Testing storage device power circuitry [patent_app_type] => utility [patent_app_number] => 15/369501 [patent_app_country] => US [patent_app_date] => 2016-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4840 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15369501 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/369501
Testing storage device power circuitry Dec 4, 2016 Issued
Array ( [id] => 11503775 [patent_doc_number] => 20170077960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'ADAPTIVELY STRENGTHENING ECC FOR SOLID STATE CACHE' [patent_app_type] => utility [patent_app_number] => 15/361094 [patent_app_country] => US [patent_app_date] => 2016-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5154 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15361094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/361094
ADAPTIVELY STRENGTHENING ECC FOR SOLID STATE CACHE Nov 24, 2016 Abandoned
Array ( [id] => 17048734 [patent_doc_number] => 11101932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Telecommunications apparatus and methods [patent_app_type] => utility [patent_app_number] => 15/775051 [patent_app_country] => US [patent_app_date] => 2016-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 13858 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15775051 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/775051
Telecommunications apparatus and methods Nov 6, 2016 Issued
Array ( [id] => 16685021 [patent_doc_number] => 10944517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Transmission of new data in a hybrid automatic repeat request (HARQ) retransmission with polar coded transmissions [patent_app_type] => utility [patent_app_number] => 16/078480 [patent_app_country] => US [patent_app_date] => 2016-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15425 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/078480
Transmission of new data in a hybrid automatic repeat request (HARQ) retransmission with polar coded transmissions Nov 3, 2016 Issued
Array ( [id] => 13095699 [patent_doc_number] => 10067186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Method and apparatus for generating featured test pattern [patent_app_type] => utility [patent_app_number] => 15/261880 [patent_app_country] => US [patent_app_date] => 2016-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4322 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15261880 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/261880
Method and apparatus for generating featured test pattern Sep 9, 2016 Issued
Array ( [id] => 11327019 [patent_doc_number] => 20160357631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'ZERO-ONE BALANCE MANAGEMENT IN A SOLID-STATE DISK CONTROLLER' [patent_app_type] => utility [patent_app_number] => 15/238839 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 19416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15238839 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/238839
Zero-one balance management in a solid-state disk controller Aug 16, 2016 Issued
Array ( [id] => 11327024 [patent_doc_number] => 20160357636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'USING ERROR CORRECTING CODES FOR PARITY PURPOSES' [patent_app_type] => utility [patent_app_number] => 15/238977 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6210 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15238977 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/238977
USING ERROR CORRECTING CODES FOR PARITY PURPOSES Aug 16, 2016 Abandoned
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