Search

Jason S Morrow

Examiner (ID: 17033, Phone: (571)272-6663 , Office: P/3612 )

Most Active Art Unit
3612
Art Unit(s)
3612
Total Applications
2528
Issued Applications
2072
Pending Applications
145
Abandoned Applications
311

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9903485 [patent_doc_number] => 20150058685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'METHOD AND SYSTEM OF TESTING SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 14/293983 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4097 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293983 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/293983
METHOD AND SYSTEM OF TESTING SEMICONDUCTOR MEMORY Jun 1, 2014 Abandoned
Array ( [id] => 11801389 [patent_doc_number] => 09542266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Semiconductor integrated circuit and method of processing in semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/287635 [patent_app_country] => US [patent_app_date] => 2014-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6651 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 468 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14287635 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/287635
Semiconductor integrated circuit and method of processing in semiconductor integrated circuit May 26, 2014 Issued
Array ( [id] => 10350710 [patent_doc_number] => 20150235715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'STACKED SEMICONDUCTOR MEMORY APPARATUS AND TEST CIRCUIT THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/279847 [patent_app_country] => US [patent_app_date] => 2014-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14279847 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/279847
STACKED SEMICONDUCTOR MEMORY APPARATUS AND TEST CIRCUIT THEREFOR May 15, 2014 Abandoned
Array ( [id] => 10446609 [patent_doc_number] => 20150331623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'METHOD AND APPARATUS FOR USING A DEFECTIVE DYNAMIC READ-ONLY MEMORY REGION' [patent_app_type] => utility [patent_app_number] => 14/280006 [patent_app_country] => US [patent_app_date] => 2014-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7053 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14280006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/280006
METHOD AND APPARATUS FOR USING A DEFECTIVE DYNAMIC READ-ONLY MEMORY REGION May 15, 2014 Abandoned
Array ( [id] => 11791583 [patent_doc_number] => 09401223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'At-speed test of memory arrays using scan' [patent_app_type] => utility [patent_app_number] => 14/273851 [patent_app_country] => US [patent_app_date] => 2014-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8007 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14273851 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/273851
At-speed test of memory arrays using scan May 8, 2014 Issued
Array ( [id] => 11522785 [patent_doc_number] => 09606180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Scan compression architecture for highly compressed designs and associated methods' [patent_app_type] => utility [patent_app_number] => 14/270935 [patent_app_country] => US [patent_app_date] => 2014-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3170 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14270935 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/270935
Scan compression architecture for highly compressed designs and associated methods May 5, 2014 Issued
Array ( [id] => 11214578 [patent_doc_number] => 09443616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Bad memory unit detection in a solid state drive' [patent_app_type] => utility [patent_app_number] => 14/263189 [patent_app_country] => US [patent_app_date] => 2014-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14263189 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/263189
Bad memory unit detection in a solid state drive Apr 27, 2014 Issued
Array ( [id] => 11185887 [patent_doc_number] => 09417287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Scheme for masking output of scan chains in test circuit' [patent_app_type] => utility [patent_app_number] => 14/254423 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14254423 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/254423
Scheme for masking output of scan chains in test circuit Apr 15, 2014 Issued
Array ( [id] => 10302438 [patent_doc_number] => 20150187438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/248460 [patent_app_country] => US [patent_app_date] => 2014-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4276 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14248460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/248460
SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD USING THE SAME Apr 8, 2014 Abandoned
Array ( [id] => 10598080 [patent_doc_number] => 09319179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-19 [patent_title] => 'Methods and apparatus for generating expanded code words to support error correction in a data communication system' [patent_app_type] => utility [patent_app_number] => 14/247685 [patent_app_country] => US [patent_app_date] => 2014-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7571 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14247685 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/247685
Methods and apparatus for generating expanded code words to support error correction in a data communication system Apr 7, 2014 Issued
Array ( [id] => 10907563 [patent_doc_number] => 20140310577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-16 [patent_title] => 'TRANSMITTING APPARATUS, INTERLEAVING METHOD THEREOF, RECEIVING APPARATUS, AND DEINTERLEAVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/246296 [patent_app_country] => US [patent_app_date] => 2014-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12562 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14246296 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/246296
Transmitting apparatus, interleaving method thereof, receiving apparatus, and deinterleaving method thereof Apr 6, 2014 Issued
Array ( [id] => 10395734 [patent_doc_number] => 20150280741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'CALCULATING CYCLIC REDUNDANCY CHECKS OVER OVERLAPPING WINDOWS OF STREAMING DATA' [patent_app_type] => utility [patent_app_number] => 14/242524 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242524 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242524
Calculating cyclic redundancy checks over overlapping windows of streaming data Mar 31, 2014 Issued
Array ( [id] => 10941620 [patent_doc_number] => 20140344641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'MEMORY SYSTEM AND CACHE MANAGEMENT METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/227496 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14227496 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/227496
MEMORY SYSTEM AND CACHE MANAGEMENT METHOD OF THE SAME Mar 26, 2014 Abandoned
Array ( [id] => 10703815 [patent_doc_number] => 20160049963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-18 [patent_title] => 'CONVOLUTIONAL DEINTERLEAVER' [patent_app_type] => utility [patent_app_number] => 14/780303 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11637 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14780303 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/780303
Receiver receiving a signal including physical layer frames, and including a convolutional deinterleaver and a deinterleaver selector Mar 26, 2014 Issued
Array ( [id] => 10914452 [patent_doc_number] => 20140317471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICES INCLUDING SEPARATELY DISPOSED ERROR-CORRECTING CODE (ECC) CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/225725 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225725 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225725
SEMICONDUCTOR MEMORY DEVICES INCLUDING SEPARATELY DISPOSED ERROR-CORRECTING CODE (ECC) CIRCUITS Mar 25, 2014 Abandoned
Array ( [id] => 14739935 [patent_doc_number] => 10389384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Data communication method and apparatus using forward error correction [patent_app_type] => utility [patent_app_number] => 14/225063 [patent_app_country] => US [patent_app_date] => 2014-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7143 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225063
Data communication method and apparatus using forward error correction Mar 24, 2014 Issued
Array ( [id] => 11489280 [patent_doc_number] => 09595352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Manufacturer self-test for solid-state drives' [patent_app_type] => utility [patent_app_number] => 14/223407 [patent_app_country] => US [patent_app_date] => 2014-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7273 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14223407 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/223407
Manufacturer self-test for solid-state drives Mar 23, 2014 Issued
Array ( [id] => 11007952 [patent_doc_number] => 20160204904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'Service Message Transmitting Method and Device' [patent_app_type] => utility [patent_app_number] => 14/912983 [patent_app_country] => US [patent_app_date] => 2014-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14912983 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/912983
Service Message Transmitting Method and Device Feb 24, 2014 Abandoned
Array ( [id] => 10697591 [patent_doc_number] => 20160043737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-11 [patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/762966 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 131 [patent_figures_cnt] => 131 [patent_no_of_words] => 45133 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14762966 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/762966
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD Jan 26, 2014 Abandoned
Array ( [id] => 10464787 [patent_doc_number] => 20150349802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/760658 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 140 [patent_figures_cnt] => 140 [patent_no_of_words] => 52434 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14760658 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/760658
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD Jan 26, 2014 Abandoned
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