Jason S Morrow

Array ( [id] => 18196332 [patent_doc_number] => 20230049851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => ECC MEMORY CHIP ENCODER AND DECODER [patent_app_type] => utility [patent_app_number] => 17/874212 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18439709 [patent_doc_number] => 20230187004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => FUSE BLOWING METHOD AND APPARATUS FOR MEMORY, STORAGE MEDIUM, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/857038 [patent_app_country] => US [patent_app_date] => 2022-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18882638 [patent_doc_number] => 20240006007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => PREDETERMINED PATTERN PROGRAM OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/856827 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19312671 [patent_doc_number] => 12038478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Hybrid solver for integrated circuit diagnostics and testing [patent_app_type] => utility [patent_app_number] => 17/855012 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18880605 [patent_doc_number] => 20240003974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE [patent_app_type] => utility [patent_app_number] => 17/810254 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18360004 [patent_doc_number] => 20230141595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => COMPENSATION METHODS FOR VOLTAGE AND TEMPERATURE (VT) DRIFT OF MEMORY INTERFACES [patent_app_type] => utility [patent_app_number] => 17/855066 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18631521 [patent_doc_number] => 20230290423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => METHOD AND APPARATUS FOR TESTING MEMORY CHIP, STORAGE MEDIUM, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/849729 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18068868 [patent_doc_number] => 20220399956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => ERROR VECTOR MAGNITUDE REQUIREMENT UPDATES [patent_app_type] => utility [patent_app_number] => 17/806667 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17884894 [patent_doc_number] => 20220300371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/836313 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17836313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18308794 [patent_doc_number] => 20230112694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => STORAGE DEVICES AND METHODS OF OPERATING STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 17/750581 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17853900 [patent_doc_number] => 20220283942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => DISTRIBUTED ERROR DETECTION AND CORRECTION WITH HAMMING CODE HANDOFF [patent_app_type] => utility [patent_app_number] => 17/749921 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17781079 [patent_doc_number] => 20220247429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => TRANSMITTER AND PUNCTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/717239 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18735538 [patent_doc_number] => 11804279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Program and operating methods of nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 17/707473 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 14163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17693336 [patent_doc_number] => 20220200629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => RECEIVER RECEIVING A SIGNAL INCLUDING PHYSICAL LAYER FRAMES, AND INCLUDING A CONVOLUTIONAL DEINTERLEAVER AND A DEINTERLEAVER SELECTOR [patent_app_type] => utility [patent_app_number] => 17/693995 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18704493 [patent_doc_number] => 11791009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Error correction system [patent_app_type] => utility [patent_app_number] => 17/668715 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 11384 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18936162 [patent_doc_number] => 11888613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Methods and systems for data transmission [patent_app_type] => utility [patent_app_number] => 17/592054 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5808 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17567494 [patent_doc_number] => 20220131644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/573190 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17566334 [patent_doc_number] => 20220130483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES [patent_app_type] => utility [patent_app_number] => 17/573257 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17567489 [patent_doc_number] => 20220131639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => TRANSMITTER AND ADDITIONAL PARITY GENERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/569163 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17693341 [patent_doc_number] => 20220200634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => RATE MATCHING FOR BLOCK ENCODING [patent_app_type] => utility [patent_app_number] => 17/567587 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567587 [rel_patent_id] =>[rel_patent_doc_number] =>)