
Jason Y. Ko
Examiner (ID: 1948)
| Most Active Art Unit | 1711 |
| Art Unit(s) | 1792, 1711 |
| Total Applications | 1498 |
| Issued Applications | 1154 |
| Pending Applications | 89 |
| Abandoned Applications | 287 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 879735
[patent_doc_number] => 07354805
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology'
[patent_app_type] => utility
[patent_app_number] => 11/739979
[patent_app_country] => US
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[pdf_file] => patents/07/354/07354805.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/739979 | Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology | Apr 24, 2007 | Issued |
Array
(
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[patent_issue_date] => 2008-07-29
[patent_title] => 'High temperature thermistors'
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[patent_app_date] => 2007-04-19
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Array
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[patent_issue_date] => 2008-10-07
[patent_title] => 'Methods of manufacturing high temperature thermistors'
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[pdf_file] => patents/07/432/07432123.pdf
[firstpage_image] =>[orig_patent_app_number] => 11788441
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/788441 | Methods of manufacturing high temperature thermistors | Apr 18, 2007 | Issued |
Array
(
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[patent_doc_number] => 20080251934
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[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices'
[patent_app_type] => utility
[patent_app_number] => 11/734931
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734931 | Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices | Apr 12, 2007 | Abandoned |
Array
(
[id] => 5123515
[patent_doc_number] => 20070235785
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[patent_issue_date] => 2007-10-11
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME'
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[patent_app_number] => 11/697641
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/697641 | Semiconductor device and method of fabricating the same | Apr 5, 2007 | Issued |
Array
(
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[patent_doc_number] => 07777297
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[patent_issue_date] => 2010-08-17
[patent_title] => 'Non-planar fuse structure including angular bend'
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[patent_app_number] => 11/693041
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Array
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[id] => 4695477
[patent_doc_number] => 20080217661
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[patent_issue_date] => 2008-09-11
[patent_title] => 'TWO-DIMENSIONAL TIME DELAY INTEGRATION VISIBLE CMOS IMAGE SENSOR'
[patent_app_type] => utility
[patent_app_number] => 11/683811
[patent_app_country] => US
[patent_app_date] => 2007-03-08
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[pdf_file] => publications/A1/0217/20080217661.pdf
[firstpage_image] =>[orig_patent_app_number] => 11683811
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/683811 | Two-dimensional time delay integration visible CMOS image sensor | Mar 7, 2007 | Issued |
Array
(
[id] => 5256714
[patent_doc_number] => 20070210346
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[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Charge transfer device'
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[patent_app_number] => 11/714191
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[patent_app_date] => 2007-03-06
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[pdf_file] => publications/A1/0210/20070210346.pdf
[firstpage_image] =>[orig_patent_app_number] => 11714191
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/714191 | Charge transfer device | Mar 5, 2007 | Abandoned |
Array
(
[id] => 5236652
[patent_doc_number] => 20070128809
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[patent_issue_date] => 2007-06-07
[patent_title] => 'METHODS OF REDUCING FLOATING BODY EFFECT'
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[patent_app_number] => 11/673968
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[patent_app_date] => 2007-02-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673968 | Methods of reducing floating body effect | Feb 11, 2007 | Issued |
Array
(
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[patent_issue_date] => 2007-06-21
[patent_title] => 'MEMORY STRUCTURE FOR REDUCED FLOATING BODY EFFECT'
[patent_app_type] => utility
[patent_app_number] => 11/673922
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673922 | Memory structure for reduced floating body effect | Feb 11, 2007 | Issued |
Array
(
[id] => 311433
[patent_doc_number] => 07528465
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[patent_title] => 'Integrated circuit on corrugated substrate'
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[patent_app_number] => 11/673536
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673536 | Integrated circuit on corrugated substrate | Feb 8, 2007 | Issued |
Array
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[id] => 583310
[patent_doc_number] => 07453090
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[patent_title] => 'Semiconductor device including a semiconductor substrate formed with a shallow impurity region'
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Array
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[patent_title] => 'HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/669951 | High voltage metal oxide semiconductor device | Jan 31, 2007 | Issued |
Array
(
[id] => 315191
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[patent_title] => 'Strained MOS devices using source/drain epitaxy'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/698864 | Semiconductor thin film device | Jan 28, 2007 | Issued |
Array
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Array
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Array
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