Javaid H Nasri
Examiner (ID: 15342)
Most Active Art Unit | 2839 |
Art Unit(s) | 2833, 2831, 2839 |
Total Applications | 2279 |
Issued Applications | 1975 |
Pending Applications | 35 |
Abandoned Applications | 239 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 5956606
[patent_doc_number] => 20110181336
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[patent_kind] => A1
[patent_issue_date] => 2011-07-28
[patent_title] => 'Output Buffer Circuit and Method for Avoiding Voltage Overshoot'
[patent_app_type] => utility
[patent_app_number] => 12/750671
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/750671 | Output buffer circuit and method for avoiding voltage overshoot | Mar 29, 2010 | Issued |
Array
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[patent_kind] => B2
[patent_issue_date] => 2012-02-28
[patent_title] => 'Frequency detection mechanism for a clock generation circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/732959 | Frequency detection mechanism for a clock generation circuit | Mar 25, 2010 | Issued |
Array
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[patent_kind] => A1
[patent_issue_date] => 2011-09-29
[patent_title] => 'METHOD AND APPARATUS FOR CHARGE PUMP LINEARIZATION IN FRACTIONAL-N PLLS'
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[patent_app_number] => 12/732024
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/732024 | Method and apparatus for charge pump linearization in fractional-N PLLs | Mar 24, 2010 | Issued |
Array
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[patent_doc_number] => 08125249
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[patent_issue_date] => 2012-02-28
[patent_title] => 'Frequency measuring circuit and semiconductor device having the same'
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Array
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[patent_issue_date] => 2012-05-15
[patent_title] => 'Digitally calibrated high speed clock distribution'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/723285 | Digitally calibrated high speed clock distribution | Mar 11, 2010 | Issued |
Array
(
[id] => 6512200
[patent_doc_number] => 20100219865
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[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'FREQUENCY DETECTION APPARATUS AND METHOD'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/712806 | Frequency detection apparatus and method | Feb 24, 2010 | Issued |
Array
(
[id] => 7577856
[patent_doc_number] => 20110291738
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[patent_kind] => A1
[patent_issue_date] => 2011-12-01
[patent_title] => 'JFET Series Connection'
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[pdf_file] => publications/A1/0291/20110291738.pdf
[firstpage_image] =>[orig_patent_app_number] => 13144085
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/144085 | JFET series connection | Feb 2, 2010 | Issued |
Array
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[id] => 7698967
[patent_doc_number] => 20110227623
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'DUTY CYCLE CORRECTING CIRCUIT AND DUTY CYCLE CORRECTING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/687985
[patent_app_country] => US
[patent_app_date] => 2010-01-15
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[pdf_file] => publications/A1/0227/20110227623.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/687985 | Duty cycle correcting circuit and duty cycle correcting method | Jan 14, 2010 | Issued |
Array
(
[id] => 8544239
[patent_doc_number] => 08319534
[patent_country] => US
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[patent_issue_date] => 2012-11-27
[patent_title] => 'Phase-locked loop'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/147615 | Phase-locked loop | Jan 10, 2010 | Issued |
Array
(
[id] => 4458113
[patent_doc_number] => 07893735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-22
[patent_title] => 'Reset circuit and system having reset circuit'
[patent_app_type] => utility
[patent_app_number] => 12/646880
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/646880 | Reset circuit and system having reset circuit | Dec 22, 2009 | Issued |
Array
(
[id] => 8283591
[patent_doc_number] => 08217691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-10
[patent_title] => 'Low power clocking scheme for a pipelined ADC'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/645165 | Low power clocking scheme for a pipelined ADC | Dec 21, 2009 | Issued |
Array
(
[id] => 5964549
[patent_doc_number] => 20110148480
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[patent_title] => 'Divider with Enhanced Duty Cycle for Precision Oscillator Clocking Sources'
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Array
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[id] => 6209146
[patent_doc_number] => 20110133793
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[patent_title] => 'CLOCK DIVIDER WITH SEAMLESS CLOCK FREQUENCY CHANGE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/630610 | CLOCK DIVIDER WITH SEAMLESS CLOCK FREQUENCY CHANGE | Dec 2, 2009 | Abandoned |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/630443 | Semiconductor memory device having a clock alignment training circuit and method for operating the same | Dec 2, 2009 | Issued |
Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/630518 | Semiconductor device having auto clock alignment training mode circuit | Dec 2, 2009 | Issued |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/624360 | Flip-flop circuit with internal level shifter | Nov 22, 2009 | Issued |