Search

Javaid H Nasri

Examiner (ID: 15342)

Most Active Art Unit
2839
Art Unit(s)
2833, 2831, 2839
Total Applications
2279
Issued Applications
1975
Pending Applications
35
Abandoned Applications
239

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6609840 [patent_doc_number] => 20100171532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'PHASE SYNCHRONIZATION LOOP TYPE FREQUENCY SYNTHESIZER OF FRACTIONAL N-TYPE, AND PHASE SHIFT CIRCUIT WITH FREQUENCY CONVERTING FUNCTION' [patent_app_type] => utility [patent_app_number] => 12/159327 [patent_app_country] => US [patent_app_date] => 2007-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7784 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171532.pdf [firstpage_image] =>[orig_patent_app_number] => 12159327 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/159327
Phase-locked loop frequency synthesizer of fractional N-type, and phase shift circuit with frequency converting function Feb 4, 2007 Issued
Array ( [id] => 7597127 [patent_doc_number] => 07619451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-17 [patent_title] => 'Techniques for compensating delays in clock signals on integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/670971 [patent_app_country] => US [patent_app_date] => 2007-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8570 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/619/07619451.pdf [firstpage_image] =>[orig_patent_app_number] => 11670971 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/670971
Techniques for compensating delays in clock signals on integrated circuits Feb 2, 2007 Issued
Array ( [id] => 6324422 [patent_doc_number] => 20100244902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'APPARATUS AND METHOD FOR PROVIDING A CLOCK SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/294799 [patent_app_country] => US [patent_app_date] => 2007-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7624 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244902.pdf [firstpage_image] =>[orig_patent_app_number] => 12294799 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294799
Apparatus and method for providing a clock signal Jan 7, 2007 Issued
Array ( [id] => 93611 [patent_doc_number] => 07737753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Method and device for adjusting or setting an electronic device' [patent_app_type] => utility [patent_app_number] => 12/087062 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2431 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/737/07737753.pdf [firstpage_image] =>[orig_patent_app_number] => 12087062 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/087062
Method and device for adjusting or setting an electronic device Dec 21, 2006 Issued
Array ( [id] => 6386264 [patent_doc_number] => 20100176872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'Charge Pump Circuit, LCD Driver IC, And Electronic Appliance' [patent_app_type] => utility [patent_app_number] => 12/067357 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8438 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176872.pdf [firstpage_image] =>[orig_patent_app_number] => 12067357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/067357
Charge pump circuit, LCD driver IC, and electronic appliance Nov 30, 2006 Issued
Array ( [id] => 5251050 [patent_doc_number] => 20070132506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Reference voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 11/603121 [patent_app_country] => US [patent_app_date] => 2006-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10741 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20070132506.pdf [firstpage_image] =>[orig_patent_app_number] => 11603121 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/603121
Reference voltage generating circuit Nov 21, 2006 Issued
Array ( [id] => 260594 [patent_doc_number] => 07573324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Reference voltage generator' [patent_app_type] => utility [patent_app_number] => 11/593540 [patent_app_country] => US [patent_app_date] => 2006-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4841 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573324.pdf [firstpage_image] =>[orig_patent_app_number] => 11593540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/593540
Reference voltage generator Nov 6, 2006 Issued
Array ( [id] => 4969037 [patent_doc_number] => 20070109039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Reference circuit capable of supplying low voltage precisely' [patent_app_type] => utility [patent_app_number] => 11/594364 [patent_app_country] => US [patent_app_date] => 2006-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5718 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20070109039.pdf [firstpage_image] =>[orig_patent_app_number] => 11594364 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/594364
Reference circuit capable of supplying low voltage precisely Nov 6, 2006 Abandoned
Array ( [id] => 4963506 [patent_doc_number] => 20080106326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'Reference voltage circuit and method for providing a reference voltage' [patent_app_type] => utility [patent_app_number] => 11/593376 [patent_app_country] => US [patent_app_date] => 2006-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3701 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20080106326.pdf [firstpage_image] =>[orig_patent_app_number] => 11593376 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/593376
Reference voltage circuit and method for providing a reference voltage Nov 5, 2006 Abandoned
Array ( [id] => 5039380 [patent_doc_number] => 20070091662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/584582 [patent_app_country] => US [patent_app_date] => 2006-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4730 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20070091662.pdf [firstpage_image] =>[orig_patent_app_number] => 11584582 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/584582
Semiconductor device having two fuses in parallel Oct 22, 2006 Issued
Array ( [id] => 5038578 [patent_doc_number] => 20070090860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'VOLTAGE BUFFER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/538810 [patent_app_country] => US [patent_app_date] => 2006-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20070090860.pdf [firstpage_image] =>[orig_patent_app_number] => 11538810 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/538810
VOLTAGE BUFFER CIRCUIT Oct 4, 2006 Abandoned
Array ( [id] => 837555 [patent_doc_number] => 07394299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Digital clock frequency multiplier' [patent_app_type] => utility [patent_app_number] => 11/538304 [patent_app_country] => US [patent_app_date] => 2006-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3915 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/394/07394299.pdf [firstpage_image] =>[orig_patent_app_number] => 11538304 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/538304
Digital clock frequency multiplier Oct 2, 2006 Issued
Array ( [id] => 5089511 [patent_doc_number] => 20070229150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Low-voltage regulated current source' [patent_app_type] => utility [patent_app_number] => 11/541549 [patent_app_country] => US [patent_app_date] => 2006-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2020 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20070229150.pdf [firstpage_image] =>[orig_patent_app_number] => 11541549 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541549
Low-voltage regulated current source Oct 2, 2006 Abandoned
Array ( [id] => 5134854 [patent_doc_number] => 20070076483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'BAND-GAP VOLTAGE REFERENCE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/537787 [patent_app_country] => US [patent_app_date] => 2006-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4815 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076483.pdf [firstpage_image] =>[orig_patent_app_number] => 11537787 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/537787
Band-gap voltage reference circuit Oct 1, 2006 Issued
Array ( [id] => 4942154 [patent_doc_number] => 20080079477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Attenuators with progressive biased field-effect transistors' [patent_app_type] => utility [patent_app_number] => 11/541476 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20080079477.pdf [firstpage_image] =>[orig_patent_app_number] => 11541476 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541476
Attenuators with progressive biased field-effect transistors Sep 28, 2006 Abandoned
Array ( [id] => 844225 [patent_doc_number] => 07388423 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-17 [patent_title] => 'Start-up circuit with folding current arrangement' [patent_app_type] => utility [patent_app_number] => 11/540124 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/388/07388423.pdf [firstpage_image] =>[orig_patent_app_number] => 11540124 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/540124
Start-up circuit with folding current arrangement Sep 28, 2006 Issued
Array ( [id] => 4942153 [patent_doc_number] => 20080079476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'Gate load impedance networks for field effect transistor attenuators and mixers' [patent_app_type] => utility [patent_app_number] => 11/541475 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20080079476.pdf [firstpage_image] =>[orig_patent_app_number] => 11541475 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541475
Gate load impedance networks for field effect transistor attenuators and mixers Sep 28, 2006 Abandoned
Array ( [id] => 5020095 [patent_doc_number] => 20070146061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'CMOS REFERENCE VOLTAGE SOURCE' [patent_app_type] => utility [patent_app_number] => 11/536809 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1137 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20070146061.pdf [firstpage_image] =>[orig_patent_app_number] => 11536809 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/536809
CMOS REFERENCE VOLTAGE SOURCE Sep 28, 2006 Abandoned
Array ( [id] => 5169361 [patent_doc_number] => 20070069792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Delay circuit' [patent_app_type] => utility [patent_app_number] => 11/528636 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4577 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069792.pdf [firstpage_image] =>[orig_patent_app_number] => 11528636 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/528636
Delay circuit Sep 27, 2006 Abandoned
Array ( [id] => 4936852 [patent_doc_number] => 20080074166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Multi-voltage multiplexer system' [patent_app_type] => utility [patent_app_number] => 11/528095 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20080074166.pdf [firstpage_image] =>[orig_patent_app_number] => 11528095 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/528095
Multi-voltage multiplexer system Sep 26, 2006 Issued
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