Javaid H Nasri
Examiner (ID: 15342)
Most Active Art Unit | 2839 |
Art Unit(s) | 2833, 2831, 2839 |
Total Applications | 2279 |
Issued Applications | 1975 |
Pending Applications | 35 |
Abandoned Applications | 239 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 800710
[patent_doc_number] => 07425858
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-09-16
[patent_title] => 'Delay line periodically operable in a closed loop'
[patent_app_type] => utility
[patent_app_number] => 11/327572
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 8350
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/425/07425858.pdf
[firstpage_image] =>[orig_patent_app_number] => 11327572
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/327572 | Delay line periodically operable in a closed loop | Jan 5, 2006 | Issued |
Array
(
[id] => 5692117
[patent_doc_number] => 20060152262
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-13
[patent_title] => 'Pulse generators with variable pulse width and sense amplifiers using the same and related methods'
[patent_app_type] => utility
[patent_app_number] => 11/327681
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5702
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20060152262.pdf
[firstpage_image] =>[orig_patent_app_number] => 11327681
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/327681 | Pulse generators with variable pulse width and sense amplifiers using the same and related methods | Jan 5, 2006 | Abandoned |
Array
(
[id] => 5192250
[patent_doc_number] => 20070080732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'Duty correction device'
[patent_app_type] => utility
[patent_app_number] => 11/323511
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3076
[patent_no_of_claims] => 14
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[pdf_file] => publications/A1/0080/20070080732.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323511
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323511 | Duty correction device | Dec 28, 2005 | Issued |
Array
(
[id] => 5751565
[patent_doc_number] => 20060220714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'Clock generator and clock duty cycle correction method'
[patent_app_type] => utility
[patent_app_number] => 11/323581
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3169
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0220/20060220714.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323581
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323581 | Clock generator and clock duty cycle correction method | Dec 28, 2005 | Issued |
Array
(
[id] => 5681298
[patent_doc_number] => 20060197565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-07
[patent_title] => 'Delay locked loop for controlling duty rate of clock'
[patent_app_type] => utility
[patent_app_number] => 11/319720
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3699
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0197/20060197565.pdf
[firstpage_image] =>[orig_patent_app_number] => 11319720
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/319720 | Delay locked loop for controlling duty rate of clock | Dec 28, 2005 | Issued |
Array
(
[id] => 5653344
[patent_doc_number] => 20060139079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Delay circuit and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/318526
[patent_app_country] => US
[patent_app_date] => 2005-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7750
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20060139079.pdf
[firstpage_image] =>[orig_patent_app_number] => 11318526
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/318526 | Delay circuit and semiconductor device | Dec 27, 2005 | Issued |
Array
(
[id] => 5217912
[patent_doc_number] => 20070159223
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Phase locked loop circuit'
[patent_app_type] => utility
[patent_app_number] => 11/319043
[patent_app_country] => US
[patent_app_date] => 2005-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3503
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20070159223.pdf
[firstpage_image] =>[orig_patent_app_number] => 11319043
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/319043 | Phase locked loop circuit | Dec 26, 2005 | Abandoned |
Array
(
[id] => 5653347
[patent_doc_number] => 20060139082
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Pulse generator and method for generating a pulse train'
[patent_app_type] => utility
[patent_app_number] => 11/315236
[patent_app_country] => US
[patent_app_date] => 2005-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4036
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20060139082.pdf
[firstpage_image] =>[orig_patent_app_number] => 11315236
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/315236 | Pulse generator and method for generating a pulse train | Dec 22, 2005 | Issued |
Array
(
[id] => 857710
[patent_doc_number] => 07375557
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-05-20
[patent_title] => 'Phase-locked loop and method thereof and a phase-frequency detector and method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/314087
[patent_app_country] => US
[patent_app_date] => 2005-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5019
[patent_no_of_claims] => 32
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/375/07375557.pdf
[firstpage_image] =>[orig_patent_app_number] => 11314087
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/314087 | Phase-locked loop and method thereof and a phase-frequency detector and method thereof | Dec 21, 2005 | Issued |
Array
(
[id] => 5217913
[patent_doc_number] => 20070159224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Duty-cycle correction circuit for differential clocking'
[patent_app_type] => utility
[patent_app_number] => 11/314909
[patent_app_country] => US
[patent_app_date] => 2005-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3969
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20070159224.pdf
[firstpage_image] =>[orig_patent_app_number] => 11314909
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/314909 | Duty-cycle correction circuit for differential clocking | Dec 20, 2005 | Abandoned |
Array
(
[id] => 5186489
[patent_doc_number] => 20070164797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Method and apparatus to eliminate clock phase error in a multi-phase clock circuit'
[patent_app_type] => utility
[patent_app_number] => 11/314038
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3353
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20070164797.pdf
[firstpage_image] =>[orig_patent_app_number] => 11314038
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/314038 | Method and apparatus to eliminate clock phase error in a multi-phase clock circuit | Dec 19, 2005 | Abandoned |
Array
(
[id] => 5869859
[patent_doc_number] => 20060164154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Charge-pump circuit and boosting method for charge-pump circuit'
[patent_app_type] => utility
[patent_app_number] => 11/304697
[patent_app_country] => US
[patent_app_date] => 2005-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 6710
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[pdf_file] => publications/A1/0164/20060164154.pdf
[firstpage_image] =>[orig_patent_app_number] => 11304697
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/304697 | Charge-pump circuit and boosting method for charge-pump circuit | Dec 15, 2005 | Issued |
Array
(
[id] => 5684916
[patent_doc_number] => 20060283231
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-21
[patent_title] => 'Signal adjustment circuit with reference circuit'
[patent_app_type] => utility
[patent_app_number] => 11/259046
[patent_app_country] => US
[patent_app_date] => 2005-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20060283231.pdf
[firstpage_image] =>[orig_patent_app_number] => 11259046
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/259046 | Signal adjustment circuit with reference circuit | Oct 26, 2005 | Abandoned |
Array
(
[id] => 5797709
[patent_doc_number] => 20060034028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'Power down protection circuit'
[patent_app_type] => utility
[patent_app_number] => 11/203392
[patent_app_country] => US
[patent_app_date] => 2005-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20060034028.pdf
[firstpage_image] =>[orig_patent_app_number] => 11203392
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/203392 | Power down protection circuit | Aug 10, 2005 | Abandoned |
Array
(
[id] => 401833
[patent_doc_number] => 07292070
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-11-06
[patent_title] => 'Programmable PPM detector'
[patent_app_type] => utility
[patent_app_number] => 11/200579
[patent_app_country] => US
[patent_app_date] => 2005-08-09
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[pdf_file] => patents/07/292/07292070.pdf
[firstpage_image] =>[orig_patent_app_number] => 11200579
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/200579 | Programmable PPM detector | Aug 8, 2005 | Issued |
Array
(
[id] => 7516084
[patent_doc_number] => 08040158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-10-18
[patent_title] => 'Frequency difference detection apparatus and method, frequency discrimination apparatus and method, and frequency synthesis apparatus and method'
[patent_app_type] => utility
[patent_app_number] => 11/883721
[patent_app_country] => US
[patent_app_date] => 2005-06-14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/040/08040158.pdf
[firstpage_image] =>[orig_patent_app_number] => 11883721
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/883721 | Frequency difference detection apparatus and method, frequency discrimination apparatus and method, and frequency synthesis apparatus and method | Jun 13, 2005 | Issued |
Array
(
[id] => 5192255
[patent_doc_number] => 20070080737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'Switch'
[patent_app_type] => utility
[patent_app_number] => 10/577085
[patent_app_country] => US
[patent_app_date] => 2004-10-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0080/20070080737.pdf
[firstpage_image] =>[orig_patent_app_number] => 10577085
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/577085 | Switching circuit for handling signal voltages greater than the supply voltage | Oct 12, 2004 | Issued |
Array
(
[id] => 5768663
[patent_doc_number] => 20050265480
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-01
[patent_title] => 'Mixer with clock resynchronization and method therefor'
[patent_app_type] => utility
[patent_app_number] => 10/853444
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[pdf_file] => publications/A1/0265/20050265480.pdf
[firstpage_image] =>[orig_patent_app_number] => 10853444
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/853444 | Mixer with clock resynchronization and method therefor | May 24, 2004 | Issued |