Search

Jay C. Chang

Examiner (ID: 164, Phone: (571)272-6132 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
685
Issued Applications
519
Pending Applications
88
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11510206 [patent_doc_number] => 09601372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Method of forming metal pads with openings in integrated circuits including forming a polymer plug extending into a metal pad' [patent_app_type] => utility [patent_app_number] => 14/990310 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 3658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14990310 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/990310
Method of forming metal pads with openings in integrated circuits including forming a polymer plug extending into a metal pad Jan 6, 2016 Issued
Array ( [id] => 11925744 [patent_doc_number] => 09793334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Electronic device with flexible display panel including polarization layer with undercut portion and micro-coating layer' [patent_app_type] => utility [patent_app_number] => 14/986000 [patent_app_country] => US [patent_app_date] => 2015-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 43 [patent_no_of_words] => 27974 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14986000 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/986000
Electronic device with flexible display panel including polarization layer with undercut portion and micro-coating layer Dec 30, 2015 Issued
Array ( [id] => 11876580 [patent_doc_number] => 09748362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'High-voltage normally-off field effect transistor with channel having multiple adjacent sections' [patent_app_type] => utility [patent_app_number] => 14/984408 [patent_app_country] => US [patent_app_date] => 2015-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14984408 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/984408
High-voltage normally-off field effect transistor with channel having multiple adjacent sections Dec 29, 2015 Issued
Array ( [id] => 11718319 [patent_doc_number] => 20170186818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 14/983445 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5917 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983445 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/983445
Image sensor Dec 28, 2015 Issued
Array ( [id] => 11014522 [patent_doc_number] => 20160211475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'MICRO ELECTRO MECHANICAL SYSTEM (MEMS) BASED WIDE-BAND POLYMER PHOTO-DETECTOR' [patent_app_type] => utility [patent_app_number] => 14/980540 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3160 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14980540 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/980540
Micro electro mechanical system (MEMS) based wide-band polymer photo-detector Dec 27, 2015 Issued
Array ( [id] => 13146297 [patent_doc_number] => 10090490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Method of producing curved display panel [patent_app_type] => utility [patent_app_number] => 15/531387 [patent_app_country] => US [patent_app_date] => 2015-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5737 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15531387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/531387
Method of producing curved display panel Nov 24, 2015 Issued
Array ( [id] => 13695439 [patent_doc_number] => 20170358674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SAME [patent_app_type] => utility [patent_app_number] => 15/531385 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15531385 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/531385
Semiconductor device, and manufacturing method for same Nov 18, 2015 Issued
Array ( [id] => 11876694 [patent_doc_number] => 09748477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Method of forming a conductive filament in a living resistive memory device including a pre-forming step to form a localised path of oxygen vacancies from an interface layer' [patent_app_type] => utility [patent_app_number] => 14/884328 [patent_app_country] => US [patent_app_date] => 2015-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 7060 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14884328 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/884328
Method of forming a conductive filament in a living resistive memory device including a pre-forming step to form a localised path of oxygen vacancies from an interface layer Oct 14, 2015 Issued
Array ( [id] => 11911428 [patent_doc_number] => 09780252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Method and apparatus for reduction of solar cell LID' [patent_app_type] => utility [patent_app_number] => 14/882737 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9315 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882737 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882737
Method and apparatus for reduction of solar cell LID Oct 13, 2015 Issued
Array ( [id] => 11876699 [patent_doc_number] => 09748481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Semiconductor device including a resistive memory layer and method of manufacturing the same including the cleaning of byproducts' [patent_app_type] => utility [patent_app_number] => 14/883216 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6696 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883216 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883216
Semiconductor device including a resistive memory layer and method of manufacturing the same including the cleaning of byproducts Oct 13, 2015 Issued
Array ( [id] => 11571956 [patent_doc_number] => 20170110600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'METHOD OF MANUFACTURING PHOTOVOLTAIC DEVICE HAVING ULTRA-SHALLOW JUNCTION LAYER' [patent_app_type] => utility [patent_app_number] => 14/883347 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3261 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883347 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883347
METHOD OF MANUFACTURING PHOTOVOLTAIC DEVICE HAVING ULTRA-SHALLOW JUNCTION LAYER Oct 13, 2015 Abandoned
Array ( [id] => 10765176 [patent_doc_number] => 20160111331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'WAFER PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/882990 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8217 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882990 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882990
Wafer processing method including attaching a protective tape to a front side of a functional layer to prevent debris adhesion Oct 13, 2015 Issued
Array ( [id] => 11432261 [patent_doc_number] => 09570588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel material' [patent_app_type] => utility [patent_app_number] => 14/883045 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3724 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883045 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883045
Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel material Oct 13, 2015 Issued
Array ( [id] => 11645282 [patent_doc_number] => 09666676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method for manufacturing a semiconductor device by exposing, to a hydrogen plasma atmosphere, a semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 14/882446 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882446
Method for manufacturing a semiconductor device by exposing, to a hydrogen plasma atmosphere, a semiconductor substrate Oct 12, 2015 Issued
Array ( [id] => 11882167 [patent_doc_number] => 09753333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Method for fabricating the liquid crystal display panels including pouring liquid crystal into dummy and panel group regions to resist pressure differences' [patent_app_type] => utility [patent_app_number] => 14/882441 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3369 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882441 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882441
Method for fabricating the liquid crystal display panels including pouring liquid crystal into dummy and panel group regions to resist pressure differences Oct 12, 2015 Issued
Array ( [id] => 11660275 [patent_doc_number] => 09673289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Dual oxide trench gate power MOSFET using oxide filled trench' [patent_app_type] => utility [patent_app_number] => 14/880886 [patent_app_country] => US [patent_app_date] => 2015-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14880886 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/880886
Dual oxide trench gate power MOSFET using oxide filled trench Oct 11, 2015 Issued
Array ( [id] => 11187439 [patent_doc_number] => 09418848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Methods of forming patterns with a mask formed utilizing a brush layer' [patent_app_type] => utility [patent_app_number] => 14/873089 [patent_app_country] => US [patent_app_date] => 2015-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 6767 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873089 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873089
Methods of forming patterns with a mask formed utilizing a brush layer Sep 30, 2015 Issued
Array ( [id] => 10495253 [patent_doc_number] => 20150380275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/848618 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14848618 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/848618
Method of manufacturing semiconductor package including forming a recessed region in a substrate Sep 8, 2015 Issued
Array ( [id] => 10455435 [patent_doc_number] => 20150340450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'TRENCH INSULATED GATE BIPOLAR TRANSISTOR AND EDGE TERMINAL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/819448 [patent_app_country] => US [patent_app_date] => 2015-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3161 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14819448 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/819448
Trench insulated gate bipolar transistor and edge terminal structure including an L-shaped electric plate capable of raising a breakdown voltage Aug 5, 2015 Issued
Array ( [id] => 11286652 [patent_doc_number] => 09502512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Trench power metal oxide semiconductor field effect transistor and edge terminal structure including an L-shaped electric plate capable of raising a breakdown voltage' [patent_app_type] => utility [patent_app_number] => 14/819450 [patent_app_country] => US [patent_app_date] => 2015-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3176 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14819450 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/819450
Trench power metal oxide semiconductor field effect transistor and edge terminal structure including an L-shaped electric plate capable of raising a breakdown voltage Aug 5, 2015 Issued
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