Search

Jay C. Chang

Examiner (ID: 164, Phone: (571)272-6132 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
685
Issued Applications
519
Pending Applications
88
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11007378 [patent_doc_number] => 20160204330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'REMOVAL OF SPURIOUS MICROWAVE MODES VIA FLIP-CHIP CROSSOVER' [patent_app_type] => utility [patent_app_number] => 14/610476 [patent_app_country] => US [patent_app_date] => 2015-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3891 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14610476 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/610476
Removal of spurious microwave modes via flip-chip crossover Jan 29, 2015 Issued
Array ( [id] => 10338358 [patent_doc_number] => 20150223363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'Multimodule' [patent_app_type] => utility [patent_app_number] => 14/589018 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9088 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14589018 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/589018
Multimodule Jan 4, 2015 Abandoned
Array ( [id] => 13099339 [patent_doc_number] => 10069016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Semiconductor diode with trench structures and including doped layers and doped zones of opposite conductivity types providing high surge energy capacity [patent_app_type] => utility [patent_app_number] => 14/548388 [patent_app_country] => US [patent_app_date] => 2014-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8320 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14548388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/548388
Semiconductor diode with trench structures and including doped layers and doped zones of opposite conductivity types providing high surge energy capacity Nov 19, 2014 Issued
Array ( [id] => 11967423 [patent_doc_number] => 20170271576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'MAGNETIC DIFFUSION BARRIERS AND FILTER IN PSTTM MTJ CONSTRUCTION' [patent_app_type] => utility [patent_app_number] => 15/503680 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5688 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15503680 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/503680
Magnetic diffusion barriers and filter in PSTTM MTJ construction Sep 25, 2014 Issued
Array ( [id] => 11180620 [patent_doc_number] => 09412615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Patterning method and semiconductor structure including forming a plurality of holes using line pattern masks' [patent_app_type] => utility [patent_app_number] => 14/492969 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 5565 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492969 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492969
Patterning method and semiconductor structure including forming a plurality of holes using line pattern masks Sep 21, 2014 Issued
Array ( [id] => 12928669 [patent_doc_number] => 09828673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Method of forming very reactive metal layers by a high vacuum plasma enhanced atomic layer deposition system [patent_app_type] => utility [patent_app_number] => 14/492269 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3557 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492269 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492269
Method of forming very reactive metal layers by a high vacuum plasma enhanced atomic layer deposition system Sep 21, 2014 Issued
Array ( [id] => 11346254 [patent_doc_number] => 09530670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Methods of forming conductive patterns and methods of manufacturing semiconductor devices using the same using an etchant composition that includes phosphoric acid, nitric acid, and an assistant oxidant' [patent_app_type] => utility [patent_app_number] => 14/492122 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 9763 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492122 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492122
Methods of forming conductive patterns and methods of manufacturing semiconductor devices using the same using an etchant composition that includes phosphoric acid, nitric acid, and an assistant oxidant Sep 21, 2014 Issued
Array ( [id] => 11904423 [patent_doc_number] => 09773865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Self-forming spacers using oxidation' [patent_app_type] => utility [patent_app_number] => 14/492123 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3928 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492123 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492123
Self-forming spacers using oxidation Sep 21, 2014 Issued
Array ( [id] => 10394868 [patent_doc_number] => 20150279875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'ARRAY SUBSTRATE AND METHOD FOR PREPARING THE SAME, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/492709 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492709 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492709
Array substrate and method for preparing the same, and display device Sep 21, 2014 Issued
Array ( [id] => 10740742 [patent_doc_number] => 20160086893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/491465 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5638 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491465 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491465
Semiconductor structure including a substrate and a semiconductor chip with matching coefficients of thermal expansion Sep 18, 2014 Issued
Array ( [id] => 10740811 [patent_doc_number] => 20160086962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'Method Of Making Embedded Memory Device With Silicon-On-Insulator Substrate' [patent_app_type] => utility [patent_app_number] => 14/491596 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2880 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491596 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491596
Method of making embedded memory device with silicon-on-insulator substrate Sep 18, 2014 Issued
Array ( [id] => 11194271 [patent_doc_number] => 09425090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Method of electrodepositing gold on a copper seed layer to form a gold metallization structure' [patent_app_type] => utility [patent_app_number] => 14/491470 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4788 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491470 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491470
Method of electrodepositing gold on a copper seed layer to form a gold metallization structure Sep 18, 2014 Issued
Array ( [id] => 12936709 [patent_doc_number] => 09831471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Method for producing organic electroluminescent display panel [patent_app_type] => utility [patent_app_number] => 15/101285 [patent_app_country] => US [patent_app_date] => 2014-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6897 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15101285 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/101285
Method for producing organic electroluminescent display panel Sep 16, 2014 Issued
Array ( [id] => 11983851 [patent_doc_number] => 20170288006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'DISPLAY MODULE AND ELECTRONIC DEVICE HAVING SAID DISPLAY MODULE' [patent_app_type] => utility [patent_app_number] => 15/507962 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15507962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/507962
Display module and electronic device having said display module Sep 1, 2014 Issued
Array ( [id] => 11796784 [patent_doc_number] => 09406632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Semiconductor package including a substrate with a stepped sidewall structure' [patent_app_type] => utility [patent_app_number] => 14/452219 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 6249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14452219 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/452219
Semiconductor package including a substrate with a stepped sidewall structure Aug 4, 2014 Issued
Array ( [id] => 11439149 [patent_doc_number] => 20170040171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/304558 [patent_app_country] => US [patent_app_date] => 2014-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1962 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15304558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/304558
Method of manufacturing semiconductor device including forming protective film within recess in substrate Jul 30, 2014 Issued
Array ( [id] => 10932615 [patent_doc_number] => 20140335636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'METHOD OF MANUFACTURING CERAMIC LED PACKAGES' [patent_app_type] => utility [patent_app_number] => 14/338307 [patent_app_country] => US [patent_app_date] => 2014-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338307 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338307
Method of manufacturing ceramic LED packages with higher heat dissipation Jul 21, 2014 Issued
Array ( [id] => 9799103 [patent_doc_number] => 20150011046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/313145 [patent_app_country] => US [patent_app_date] => 2014-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 33472 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14313145 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/313145
Semiconductor device and method for manufacturing semiconductor device including an electron trap layer Jun 23, 2014 Issued
Array ( [id] => 11918218 [patent_doc_number] => 09786409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Metathesis polymers as dielectrics' [patent_app_type] => utility [patent_app_number] => 14/392298 [patent_app_country] => US [patent_app_date] => 2014-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6486 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14392298 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/392298
Metathesis polymers as dielectrics Jun 22, 2014 Issued
Array ( [id] => 9737673 [patent_doc_number] => 20140273391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'INDUCTIVE ELEMENT WITH INTERRUPTER REGION AND METHOD FOR FORMING' [patent_app_type] => utility [patent_app_number] => 14/288268 [patent_app_country] => US [patent_app_date] => 2014-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4375 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288268 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288268
Inductive element with interrupter region and method for forming May 26, 2014 Issued
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