Search

Jay C. Chang

Examiner (ID: 17046, Phone: (571)272-6132 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
698
Issued Applications
528
Pending Applications
84
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18812615 [patent_doc_number] => 20230386952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => FAN-OUT WAFER-LEVEL PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/142412 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142412
FAN-OUT WAFER-LEVEL PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME May 1, 2023 Pending
Array ( [id] => 18570582 [patent_doc_number] => 20230260919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR PACKAGE AND ANTENNA MODULE COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 18/141568 [patent_app_country] => US [patent_app_date] => 2023-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141568 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141568
Semiconductor package and antenna module comprising the same Apr 30, 2023 Issued
Array ( [id] => 19546425 [patent_doc_number] => 20240363461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Millimeter-Wave Passive Circuit Designs with Wafer-Level Chip-Scale Package [patent_app_type] => utility [patent_app_number] => 18/309277 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/309277
Millimeter-Wave Passive Circuit Designs with Wafer-Level Chip-Scale Package Apr 27, 2023 Pending
Array ( [id] => 19546550 [patent_doc_number] => 20240363586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => SEMICONDUCTOR PACKAGE AND FORMING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/307793 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18307793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/307793
SEMICONDUCTOR PACKAGE AND FORMING METHOD OF THE SAME Apr 25, 2023 Pending
Array ( [id] => 19515783 [patent_doc_number] => 20240347469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => ALIGNMENT MARK VIA ASSEMBLIES FOR A COMPOSITE INTERPOSER AND METHODS OF USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/300104 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300104 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/300104
ALIGNMENT MARK VIA ASSEMBLIES FOR A COMPOSITE INTERPOSER AND METHODS OF USING THE SAME Apr 12, 2023 Pending
Array ( [id] => 18712820 [patent_doc_number] => 20230335453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => PACKAGING STRUCTURE AND PACKAGING METHOD [patent_app_type] => utility [patent_app_number] => 18/132295 [patent_app_country] => US [patent_app_date] => 2023-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132295 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132295
Packaging structure and packaging method Apr 6, 2023 Issued
Array ( [id] => 18679882 [patent_doc_number] => 20230317540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => ELECTRONIC CIRCUIT PACKAGE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE HAVING ELECTRONIC CIRCUIT PACKAGE [patent_app_type] => utility [patent_app_number] => 18/295377 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295377
ELECTRONIC CIRCUIT PACKAGE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE HAVING ELECTRONIC CIRCUIT PACKAGE Apr 3, 2023 Pending
Array ( [id] => 19484165 [patent_doc_number] => 20240332207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Semiconductor Device and Method of Forming High Crystal Quality Magnetic Layer for Shielding of Low Frequency Magnetic Fields [patent_app_type] => utility [patent_app_number] => 18/193894 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193894 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193894
Semiconductor Device and Method of Forming High Crystal Quality Magnetic Layer for Shielding of Low Frequency Magnetic Fields Mar 30, 2023 Pending
Array ( [id] => 19500366 [patent_doc_number] => 20240339384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => FLIP CHIP SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/193506 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193506 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193506
FLIP CHIP SEMICONDUCTOR DEVICE PACKAGE Mar 29, 2023 Pending
Array ( [id] => 19484162 [patent_doc_number] => 20240332204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => HIGHLY INTEGRATED POWER ELECTRONICS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/127717 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18127717 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/127717
Highly integrated power electronics and methods of manufacturing the same Mar 28, 2023 Issued
Array ( [id] => 19484062 [patent_doc_number] => 20240332104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Component Carrier With Reinforcement Layer Structure and Manufacturing Method Using Two Temporary Carriers [patent_app_type] => utility [patent_app_number] => 18/191867 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191867 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191867
Component Carrier With Reinforcement Layer Structure and Manufacturing Method Using Two Temporary Carriers Mar 27, 2023 Pending
Array ( [id] => 19452826 [patent_doc_number] => 20240312956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => Subtractive Metal Structuring on Surface of Semiconductor Package [patent_app_type] => utility [patent_app_number] => 18/122776 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18122776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/122776
Subtractive Metal Structuring on Surface of Semiconductor Package Mar 16, 2023 Pending
Array ( [id] => 18500558 [patent_doc_number] => 20230223352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/121569 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121569
Semiconductor package structure and method for manufacturing the same Mar 13, 2023 Issued
Array ( [id] => 18488471 [patent_doc_number] => 20230215819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING APPARATUS AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/121145 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121145
Method of manufacturing semiconductor devices, corresponding apparatus and semiconductor device Mar 13, 2023 Issued
Array ( [id] => 18615792 [patent_doc_number] => 20230282531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => FAN-OUT WATER-LEVEL PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/116296 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18116296 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/116296
FAN-OUT WATER-LEVEL PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF Feb 28, 2023 Pending
Array ( [id] => 19420963 [patent_doc_number] => 20240297087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => PACKAGE MODULE WITH A MODULE STIFFENER AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/115840 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115840
PACKAGE MODULE WITH A MODULE STIFFENER AND METHODS OF FORMING THE SAME Feb 28, 2023 Pending
Array ( [id] => 20566215 [patent_doc_number] => 12568842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Highly integrated power electronics and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/115359 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 1050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115359
Highly integrated power electronics and methods of manufacturing the same Feb 27, 2023 Issued
Array ( [id] => 18757591 [patent_doc_number] => 20230361054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/115545 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115545 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115545
Semiconductor package and method of manufacturing semiconductor package Feb 27, 2023 Issued
Array ( [id] => 19781688 [patent_doc_number] => 12230727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Contacts for solar cells [patent_app_type] => utility [patent_app_number] => 18/114119 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18114119 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/114119
Contacts for solar cells Feb 23, 2023 Issued
Array ( [id] => 19384634 [patent_doc_number] => 20240274504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => PACKAGE LID WITH A VAPOR CHAMBER BASE HAVING AN ANGLED PORTION AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/110219 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110219 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110219
Package lid with a vapor chamber base having an angled portion and methods for forming the same Feb 14, 2023 Issued
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