Search

Jay C. Chang

Examiner (ID: 164, Phone: (571)272-6132 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
685
Issued Applications
519
Pending Applications
88
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18500558 [patent_doc_number] => 20230223352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/121569 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121569
Semiconductor package structure and method for manufacturing the same Mar 13, 2023 Issued
Array ( [id] => 19420963 [patent_doc_number] => 20240297087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => PACKAGE MODULE WITH A MODULE STIFFENER AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/115840 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115840
PACKAGE MODULE WITH A MODULE STIFFENER AND METHODS OF FORMING THE SAME Feb 28, 2023 Pending
Array ( [id] => 18615792 [patent_doc_number] => 20230282531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => FAN-OUT WATER-LEVEL PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/116296 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18116296 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/116296
FAN-OUT WATER-LEVEL PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF Feb 28, 2023 Pending
Array ( [id] => 18757591 [patent_doc_number] => 20230361054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/115545 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115545 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115545
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE Feb 27, 2023 Pending
Array ( [id] => 19407121 [patent_doc_number] => 20240290632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => HIGHLY INTEGRATED POWER ELECTRONICS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/115359 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115359
HIGHLY INTEGRATED POWER ELECTRONICS AND METHODS OF MANUFACTURING THE SAME Feb 27, 2023 Pending
Array ( [id] => 19781688 [patent_doc_number] => 12230727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Contacts for solar cells [patent_app_type] => utility [patent_app_number] => 18/114119 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18114119 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/114119
Contacts for solar cells Feb 23, 2023 Issued
Array ( [id] => 19384634 [patent_doc_number] => 20240274504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => PACKAGE LID WITH A VAPOR CHAMBER BASE HAVING AN ANGLED PORTION AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/110219 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110219 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110219
PACKAGE LID WITH A VAPOR CHAMBER BASE HAVING AN ANGLED PORTION AND METHODS FOR FORMING THE SAME Feb 14, 2023 Pending
Array ( [id] => 18631795 [patent_doc_number] => 20230290700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => ANTENNA PACKAGE [patent_app_type] => utility [patent_app_number] => 18/109266 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109266 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109266
ANTENNA PACKAGE Feb 13, 2023 Pending
Array ( [id] => 19384695 [patent_doc_number] => 20240274565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => DIE PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/168434 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168434 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168434
DIE PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME Feb 12, 2023 Pending
Array ( [id] => 19116428 [patent_doc_number] => 20240128178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/166122 [patent_app_country] => US [patent_app_date] => 2023-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166122 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/166122
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Feb 7, 2023 Pending
Array ( [id] => 19206191 [patent_doc_number] => 20240178090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/165921 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165921 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165921
PACKAGE STRUCTURE Feb 6, 2023 Pending
Array ( [id] => 20496918 [patent_doc_number] => 12538812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Semiconductor packages with wettable flanks and related methods [patent_app_type] => utility [patent_app_number] => 18/165545 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165545 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165545
Semiconductor packages with wettable flanks and related methods Feb 6, 2023 Issued
Array ( [id] => 19206116 [patent_doc_number] => 20240178015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MANUFACTURING METHOD OF THE SEMICONDUCTOR PACKAGE, PICK AND PLACE DEVICE, AND WORKPIECE HANDLING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/165896 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165896
MANUFACTURING METHOD OF THE SEMICONDUCTOR PACKAGE, PICK AND PLACE DEVICE, AND WORKPIECE HANDLING APPARATUS Feb 6, 2023 Pending
Array ( [id] => 18570544 [patent_doc_number] => 20230260881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/163884 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163884
SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME Feb 2, 2023 Pending
Array ( [id] => 19364285 [patent_doc_number] => 20240266319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Method of Multi-layer Die Stacking with Die-to-Wafer Bonding [patent_app_type] => utility [patent_app_number] => 18/105801 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18105801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/105801
Method of Multi-layer Die Stacking with Die-to-Wafer Bonding Feb 2, 2023 Pending
Array ( [id] => 18615909 [patent_doc_number] => 20230282648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => METAL OXIDE AND FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/104817 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104817
Metal oxide and field-effect transistor Feb 1, 2023 Issued
Array ( [id] => 19116393 [patent_doc_number] => 20240128143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/162715 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162715 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162715
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME Jan 31, 2023 Pending
Array ( [id] => 19335556 [patent_doc_number] => 20240249986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/098833 [patent_app_country] => US [patent_app_date] => 2023-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098833 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/098833
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES Jan 18, 2023 Pending
Array ( [id] => 18623792 [patent_doc_number] => 11756848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-12 [patent_title] => Chip integration into cavities of a host wafer using lateral dielectric material bonding [patent_app_type] => utility [patent_app_number] => 18/155607 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7435 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155607 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/155607
Chip integration into cavities of a host wafer using lateral dielectric material bonding Jan 16, 2023 Issued
Array ( [id] => 18514646 [patent_doc_number] => 20230230906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => MANUFACTURING OF ELECTRONIC COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/154638 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154638 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/154638
MANUFACTURING OF ELECTRONIC COMPONENTS Jan 12, 2023 Pending
Menu