Search

Jay C. Chang

Examiner (ID: 15192)

Most Active Art Unit
2895
Art Unit(s)
2895, 2817
Total Applications
708
Issued Applications
532
Pending Applications
88
Abandoned Applications
101

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17373736 [patent_doc_number] => 20220028788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => INORGANIC-BASED EMBEDDED-DIE LAYERS FOR MODULAR SEMICONDUCTIVE DEVICES [patent_app_type] => utility [patent_app_number] => 17/492476 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492476
Inorganic-based embedded-die layers for modular semiconductive devices Sep 30, 2021 Issued
Array ( [id] => 19138035 [patent_doc_number] => 11973010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Chip packaging method and chip package unit [patent_app_type] => utility [patent_app_number] => 17/490038 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 2694 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490038 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490038
Chip packaging method and chip package unit Sep 29, 2021 Issued
Array ( [id] => 19153769 [patent_doc_number] => 11978692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Semiconductor package, semiconductor module and methods for manufacturing a semiconductor package and a semiconductor module [patent_app_type] => utility [patent_app_number] => 17/471249 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 59 [patent_no_of_words] => 13695 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471249 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471249
Semiconductor package, semiconductor module and methods for manufacturing a semiconductor package and a semiconductor module Sep 9, 2021 Issued
Array ( [id] => 17708706 [patent_doc_number] => 20220208714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD [patent_app_type] => utility [patent_app_number] => 17/468527 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468527
INTEGRATED CIRCUIT PACKAGE STRUCTURE, INTEGRATED CIRCUIT PACKAGE UNIT AND ASSOCIATED PACKAGING METHOD Sep 6, 2021 Abandoned
Array ( [id] => 18935421 [patent_doc_number] => 11887863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Double-sided partial molded SIP module [patent_app_type] => utility [patent_app_number] => 17/447029 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 4631 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447029
Double-sided partial molded SIP module Sep 6, 2021 Issued
Array ( [id] => 18228924 [patent_doc_number] => 20230067918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => LEADFRAME-LESS LASER DIRECT STRUCTURING (LDS) PACKAGE [patent_app_type] => utility [patent_app_number] => 17/463140 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463140 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463140
Leadframe-less laser direct structuring (LDS) package Aug 30, 2021 Issued
Array ( [id] => 18229269 [patent_doc_number] => 20230068263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/460319 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460319 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460319
Semiconductor structure and method of forming the same Aug 29, 2021 Issued
Array ( [id] => 19858241 [patent_doc_number] => 12261092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/460346 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 6288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460346
Semiconductor package and manufacturing method thereof Aug 29, 2021 Issued
Array ( [id] => 19539467 [patent_doc_number] => 12132024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/460301 [patent_app_country] => US [patent_app_date] => 2021-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 38 [patent_no_of_words] => 20045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460301 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460301
Semiconductor package and method of manufacturing the same Aug 28, 2021 Issued
Array ( [id] => 18223152 [patent_doc_number] => 20230062146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => Semiconductor Package and Method of Forming Thereof [patent_app_type] => utility [patent_app_number] => 17/458854 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458854
Semiconductor package and method of forming thereof Aug 26, 2021 Issued
Array ( [id] => 18227381 [patent_doc_number] => 20230066375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => APPARATUS INCLUDING DIRECT-CONTACT HEAT PATHS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/412604 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412604
Apparatus including direct-contact heat paths and methods of manufacturing the same Aug 25, 2021 Issued
Array ( [id] => 18195807 [patent_doc_number] => 20230049326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DEVICE DIE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/401318 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401318
Device die and method for fabricating the same Aug 12, 2021 Issued
Array ( [id] => 18865833 [patent_doc_number] => 20230420270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD FOR PRODUCING WIRING BOARD [patent_app_type] => utility [patent_app_number] => 18/036271 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18036271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/036271
METHOD FOR PRODUCING WIRING BOARD Aug 5, 2021 Pending
Array ( [id] => 18804335 [patent_doc_number] => 11837498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Semiconductor memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/387787 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 62 [patent_no_of_words] => 19483 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387787
Semiconductor memory device and manufacturing method thereof Jul 27, 2021 Issued
Array ( [id] => 19414764 [patent_doc_number] => 12080601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Packaged semiconductor devices and methods therefor [patent_app_type] => utility [patent_app_number] => 17/377507 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5491 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377507 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377507
Packaged semiconductor devices and methods therefor Jul 15, 2021 Issued
Array ( [id] => 17319023 [patent_doc_number] => 20210408073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => METAL OXIDE AND FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/371153 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371153
Metal oxide and field-effect transistor Jul 8, 2021 Issued
Array ( [id] => 18097489 [patent_doc_number] => 20220415830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => CHIP PACKAGE WITH SUBSTRATE INTEGRATED WAVEGUIDE AND WAVEGUIDE INTERFACE [patent_app_type] => utility [patent_app_number] => 17/356831 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356831
Chip package with substrate integrated waveguide and waveguide interface Jun 23, 2021 Issued
Array ( [id] => 18402195 [patent_doc_number] => 11664345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Semiconductor package element [patent_app_type] => utility [patent_app_number] => 17/353836 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3416 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353836 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353836
Semiconductor package element Jun 21, 2021 Issued
Array ( [id] => 17145410 [patent_doc_number] => 20210313423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => BACK SIDE DOPANT ACTIVATION IN FIELD STOP IGBT [patent_app_type] => utility [patent_app_number] => 17/353444 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353444
Back side dopant activation in field stop IGBT Jun 20, 2021 Issued
Array ( [id] => 17145263 [patent_doc_number] => 20210313276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR PACKAGE AND ANTENNA MODULE COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 17/353074 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353074
Semiconductor package and antenna module comprising the same Jun 20, 2021 Issued
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