Search

Jay Huang

Examiner (ID: 4119)

Most Active Art Unit
3685
Art Unit(s)
3685, 3619
Total Applications
545
Issued Applications
257
Pending Applications
70
Abandoned Applications
232

Applications

Application numberTitle of the applicationFiling DateStatus
08/775110 METHOD OF AVOIDING DISTURBANCE DURING THE STEP OF PROGRAMMING AND ERASING AN ELECTRICALLY PROGRAMMABLE, SEMICONDUCTOR NON-VOLATILE STORAGE DEVICE Dec 29, 1996 Abandoned
08/777514 REDUNDANCY FUSE BOX AND METHOD FOR ARRANGING THE SAME Dec 29, 1996 Abandoned
Array ( [id] => 3897757 [patent_doc_number] => 05715201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Self-tracking delay-matching write pulse control circuit and method' [patent_app_type] => 1 [patent_app_number] => 8/773600 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4555 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715201.pdf [firstpage_image] =>[orig_patent_app_number] => 773600 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773600
Self-tracking delay-matching write pulse control circuit and method Dec 26, 1996 Issued
Array ( [id] => 3837683 [patent_doc_number] => 05784321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Semiconductor memory device with redundant circuit' [patent_app_type] => 1 [patent_app_number] => 8/773254 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4989 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784321.pdf [firstpage_image] =>[orig_patent_app_number] => 773254 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773254
Semiconductor memory device with redundant circuit Dec 22, 1996 Issued
Array ( [id] => 3837696 [patent_doc_number] => 05784322 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Standby current detecting circuit for use in a semiconductor memory device and method thereof' [patent_app_type] => 1 [patent_app_number] => 8/772356 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2517 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784322.pdf [firstpage_image] =>[orig_patent_app_number] => 772356 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/772356
Standby current detecting circuit for use in a semiconductor memory device and method thereof Dec 22, 1996 Issued
Array ( [id] => 3957031 [patent_doc_number] => 05982659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Memory cell capable of storing more than two logic states by using different via resistances' [patent_app_type] => 1 [patent_app_number] => 8/779998 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3482 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982659.pdf [firstpage_image] =>[orig_patent_app_number] => 779998 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/779998
Memory cell capable of storing more than two logic states by using different via resistances Dec 22, 1996 Issued
Array ( [id] => 3913208 [patent_doc_number] => 05751656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Synchronous DRAM memory with asynchronous column decode' [patent_app_type] => 1 [patent_app_number] => 8/772974 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751656.pdf [firstpage_image] =>[orig_patent_app_number] => 772974 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/772974
Synchronous DRAM memory with asynchronous column decode Dec 22, 1996 Issued
Array ( [id] => 3896264 [patent_doc_number] => 05894434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'MOS static memory array' [patent_app_type] => 1 [patent_app_number] => 8/770756 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4055 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894434.pdf [firstpage_image] =>[orig_patent_app_number] => 770756 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770756
MOS static memory array Dec 18, 1996 Issued
Array ( [id] => 3790132 [patent_doc_number] => 05757707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/768556 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 8872 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757707.pdf [firstpage_image] =>[orig_patent_app_number] => 768556 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768556
Semiconductor memory device Dec 17, 1996 Issued
Array ( [id] => 3845958 [patent_doc_number] => 05815460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Memory circuit sequentially accessible by arbitrary address' [patent_app_type] => 1 [patent_app_number] => 8/769181 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7523 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815460.pdf [firstpage_image] =>[orig_patent_app_number] => 769181 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/769181
Memory circuit sequentially accessible by arbitrary address Dec 17, 1996 Issued
Array ( [id] => 3756804 [patent_doc_number] => 05801999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/769158 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 9446 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801999.pdf [firstpage_image] =>[orig_patent_app_number] => 769158 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/769158
Semiconductor memory Dec 17, 1996 Issued
Array ( [id] => 3789340 [patent_doc_number] => 05808948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/769615 [patent_app_country] => US [patent_app_date] => 1996-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2592 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808948.pdf [firstpage_image] =>[orig_patent_app_number] => 769615 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/769615
Semiconductor memory device Dec 17, 1996 Issued
Array ( [id] => 4086091 [patent_doc_number] => 05966318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers' [patent_app_type] => 1 [patent_app_number] => 8/768256 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6612 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966318.pdf [firstpage_image] =>[orig_patent_app_number] => 768256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768256
Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers Dec 16, 1996 Issued
Array ( [id] => 3873536 [patent_doc_number] => 05796674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Signal transition detection circuit' [patent_app_type] => 1 [patent_app_number] => 8/767451 [patent_app_country] => US [patent_app_date] => 1996-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 8138 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796674.pdf [firstpage_image] =>[orig_patent_app_number] => 767451 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/767451
Signal transition detection circuit Dec 15, 1996 Issued
Array ( [id] => 3866824 [patent_doc_number] => 05768188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Multi-state non-volatile semiconductor memory and method for driving the same' [patent_app_type] => 1 [patent_app_number] => 8/763612 [patent_app_country] => US [patent_app_date] => 1996-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 9015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768188.pdf [firstpage_image] =>[orig_patent_app_number] => 763612 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763612
Multi-state non-volatile semiconductor memory and method for driving the same Dec 10, 1996 Issued
Array ( [id] => 3845672 [patent_doc_number] => 05815446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Potential generation circuit' [patent_app_type] => 1 [patent_app_number] => 8/763120 [patent_app_country] => US [patent_app_date] => 1996-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4579 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815446.pdf [firstpage_image] =>[orig_patent_app_number] => 763120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763120
Potential generation circuit Dec 9, 1996 Issued
Array ( [id] => 3873169 [patent_doc_number] => 05796648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Nonvolatile semiconductor memory device and method for manufacturing same' [patent_app_type] => 1 [patent_app_number] => 8/762923 [patent_app_country] => US [patent_app_date] => 1996-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 26 [patent_no_of_words] => 8752 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796648.pdf [firstpage_image] =>[orig_patent_app_number] => 762923 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/762923
Nonvolatile semiconductor memory device and method for manufacturing same Dec 9, 1996 Issued
Array ( [id] => 3904794 [patent_doc_number] => 05835401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Dram with hidden refresh' [patent_app_type] => 1 [patent_app_number] => 8/760823 [patent_app_country] => US [patent_app_date] => 1996-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 11678 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835401.pdf [firstpage_image] =>[orig_patent_app_number] => 760823 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/760823
Dram with hidden refresh Dec 4, 1996 Issued
Array ( [id] => 4247550 [patent_doc_number] => 06118722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Integrated circuit memory device' [patent_app_type] => 1 [patent_app_number] => 8/759353 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4828 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/118/06118722.pdf [firstpage_image] =>[orig_patent_app_number] => 759353 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/759353
Integrated circuit memory device Dec 2, 1996 Issued
Array ( [id] => 4171845 [patent_doc_number] => 06115318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Clock vernier adjustment' [patent_app_type] => 1 [patent_app_number] => 8/759351 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6369 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115318.pdf [firstpage_image] =>[orig_patent_app_number] => 759351 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/759351
Clock vernier adjustment Dec 2, 1996 Issued
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