
Jay Huang
Examiner (ID: 4119)
| Most Active Art Unit | 3685 |
| Art Unit(s) | 3685, 3619 |
| Total Applications | 545 |
| Issued Applications | 257 |
| Pending Applications | 70 |
| Abandoned Applications | 232 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 08/775110 | METHOD OF AVOIDING DISTURBANCE DURING THE STEP OF PROGRAMMING AND ERASING AN ELECTRICALLY PROGRAMMABLE, SEMICONDUCTOR NON-VOLATILE STORAGE DEVICE | Dec 29, 1996 | Abandoned |
| 08/777514 | REDUNDANCY FUSE BOX AND METHOD FOR ARRANGING THE SAME | Dec 29, 1996 | Abandoned |
Array
(
[id] => 3897757
[patent_doc_number] => 05715201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-03
[patent_title] => 'Self-tracking delay-matching write pulse control circuit and method'
[patent_app_type] => 1
[patent_app_number] => 8/773600
[patent_app_country] => US
[patent_app_date] => 1996-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4555
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[pdf_file] => patents/05/715/05715201.pdf
[firstpage_image] =>[orig_patent_app_number] => 773600
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/773600 | Self-tracking delay-matching write pulse control circuit and method | Dec 26, 1996 | Issued |
Array
(
[id] => 3837683
[patent_doc_number] => 05784321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Semiconductor memory device with redundant circuit'
[patent_app_type] => 1
[patent_app_number] => 8/773254
[patent_app_country] => US
[patent_app_date] => 1996-12-23
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[firstpage_image] =>[orig_patent_app_number] => 773254
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/773254 | Semiconductor memory device with redundant circuit | Dec 22, 1996 | Issued |
Array
(
[id] => 3837696
[patent_doc_number] => 05784322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Standby current detecting circuit for use in a semiconductor memory device and method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/772356
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[patent_app_date] => 1996-12-23
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[firstpage_image] =>[orig_patent_app_number] => 772356
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/772356 | Standby current detecting circuit for use in a semiconductor memory device and method thereof | Dec 22, 1996 | Issued |
Array
(
[id] => 3957031
[patent_doc_number] => 05982659
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Memory cell capable of storing more than two logic states by using different via resistances'
[patent_app_type] => 1
[patent_app_number] => 8/779998
[patent_app_country] => US
[patent_app_date] => 1996-12-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/779998 | Memory cell capable of storing more than two logic states by using different via resistances | Dec 22, 1996 | Issued |
Array
(
[id] => 3913208
[patent_doc_number] => 05751656
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Synchronous DRAM memory with asynchronous column decode'
[patent_app_type] => 1
[patent_app_number] => 8/772974
[patent_app_country] => US
[patent_app_date] => 1996-12-23
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[firstpage_image] =>[orig_patent_app_number] => 772974
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/772974 | Synchronous DRAM memory with asynchronous column decode | Dec 22, 1996 | Issued |
Array
(
[id] => 3896264
[patent_doc_number] => 05894434
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[patent_kind] => NA
[patent_issue_date] => 1999-04-13
[patent_title] => 'MOS static memory array'
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[patent_app_number] => 8/770756
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[firstpage_image] =>[orig_patent_app_number] => 770756
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/770756 | MOS static memory array | Dec 18, 1996 | Issued |
Array
(
[id] => 3790132
[patent_doc_number] => 05757707
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[patent_issue_date] => 1998-05-26
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[patent_app_type] => 1
[patent_app_number] => 8/768556
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[pdf_file] => patents/05/757/05757707.pdf
[firstpage_image] =>[orig_patent_app_number] => 768556
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768556 | Semiconductor memory device | Dec 17, 1996 | Issued |
Array
(
[id] => 3845958
[patent_doc_number] => 05815460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-29
[patent_title] => 'Memory circuit sequentially accessible by arbitrary address'
[patent_app_type] => 1
[patent_app_number] => 8/769181
[patent_app_country] => US
[patent_app_date] => 1996-12-18
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[pdf_file] => patents/05/815/05815460.pdf
[firstpage_image] =>[orig_patent_app_number] => 769181
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/769181 | Memory circuit sequentially accessible by arbitrary address | Dec 17, 1996 | Issued |
Array
(
[id] => 3756804
[patent_doc_number] => 05801999
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[patent_issue_date] => 1998-09-01
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/769158
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[pdf_file] => patents/05/801/05801999.pdf
[firstpage_image] =>[orig_patent_app_number] => 769158
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/769158 | Semiconductor memory | Dec 17, 1996 | Issued |
Array
(
[id] => 3789340
[patent_doc_number] => 05808948
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[patent_issue_date] => 1998-09-15
[patent_title] => 'Semiconductor memory device'
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[firstpage_image] =>[orig_patent_app_number] => 769615
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/769615 | Semiconductor memory device | Dec 17, 1996 | Issued |
Array
(
[id] => 4086091
[patent_doc_number] => 05966318
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[patent_kind] => NA
[patent_issue_date] => 1999-10-12
[patent_title] => 'Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers'
[patent_app_type] => 1
[patent_app_number] => 8/768256
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[firstpage_image] =>[orig_patent_app_number] => 768256
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768256 | Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers | Dec 16, 1996 | Issued |
Array
(
[id] => 3873536
[patent_doc_number] => 05796674
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-18
[patent_title] => 'Signal transition detection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/767451
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[firstpage_image] =>[orig_patent_app_number] => 767451
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/767451 | Signal transition detection circuit | Dec 15, 1996 | Issued |
Array
(
[id] => 3866824
[patent_doc_number] => 05768188
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[patent_issue_date] => 1998-06-16
[patent_title] => 'Multi-state non-volatile semiconductor memory and method for driving the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/763612 | Multi-state non-volatile semiconductor memory and method for driving the same | Dec 10, 1996 | Issued |
Array
(
[id] => 3845672
[patent_doc_number] => 05815446
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[patent_title] => 'Potential generation circuit'
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[patent_app_number] => 8/763120
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Array
(
[id] => 3873169
[patent_doc_number] => 05796648
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Array
(
[id] => 3904794
[patent_doc_number] => 05835401
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[patent_issue_date] => 1998-11-10
[patent_title] => 'Dram with hidden refresh'
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[firstpage_image] =>[orig_patent_app_number] => 760823
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/760823 | Dram with hidden refresh | Dec 4, 1996 | Issued |
Array
(
[id] => 4247550
[patent_doc_number] => 06118722
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[patent_issue_date] => 2000-09-12
[patent_title] => 'Integrated circuit memory device'
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[firstpage_image] =>[orig_patent_app_number] => 759353
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759353 | Integrated circuit memory device | Dec 2, 1996 | Issued |
Array
(
[id] => 4171845
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[patent_title] => 'Clock vernier adjustment'
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