Search

Jay Huang

Examiner (ID: 4119)

Most Active Art Unit
3685
Art Unit(s)
3685, 3619
Total Applications
545
Issued Applications
257
Pending Applications
70
Abandoned Applications
232

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4407193 [patent_doc_number] => 06298000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Dynamic type semiconductor memory device operable in self refresh operation mode and self refresh method thereof' [patent_app_type] => 1 [patent_app_number] => 8/515767 [patent_app_country] => US [patent_app_date] => 1995-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 38 [patent_no_of_words] => 15975 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298000.pdf [firstpage_image] =>[orig_patent_app_number] => 515767 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/515767
Dynamic type semiconductor memory device operable in self refresh operation mode and self refresh method thereof Aug 14, 1995 Issued
Array ( [id] => 3844520 [patent_doc_number] => 05761125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Cell threshold value distribution detection circuit and method of detecting cell threshold value' [patent_app_type] => 1 [patent_app_number] => 8/512914 [patent_app_country] => US [patent_app_date] => 1995-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11512 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761125.pdf [firstpage_image] =>[orig_patent_app_number] => 512914 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512914
Cell threshold value distribution detection circuit and method of detecting cell threshold value Aug 8, 1995 Issued
Array ( [id] => 3892714 [patent_doc_number] => 05748558 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/508754 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 5323 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748558.pdf [firstpage_image] =>[orig_patent_app_number] => 508754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/508754
Semiconductor memory device Jul 30, 1995 Issued
Array ( [id] => 4284719 [patent_doc_number] => 06246605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Static RAM with improved memory cell pattern' [patent_app_type] => 1 [patent_app_number] => 8/509638 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2499 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246605.pdf [firstpage_image] =>[orig_patent_app_number] => 509638 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509638
Static RAM with improved memory cell pattern Jul 30, 1995 Issued
Array ( [id] => 3544813 [patent_doc_number] => 05557576 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Method and apparatus for monitoring illegal conditions in a nonvolatile memory circuit' [patent_app_type] => 1 [patent_app_number] => 8/506970 [patent_app_country] => US [patent_app_date] => 1995-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8889 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557576.pdf [firstpage_image] =>[orig_patent_app_number] => 506970 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506970
Method and apparatus for monitoring illegal conditions in a nonvolatile memory circuit Jul 27, 1995 Issued
Array ( [id] => 3601241 [patent_doc_number] => 05568419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Non-volatile semiconductor memory device and data erasing method therefor' [patent_app_type] => 1 [patent_app_number] => 8/507968 [patent_app_country] => US [patent_app_date] => 1995-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5829 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568419.pdf [firstpage_image] =>[orig_patent_app_number] => 507968 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/507968
Non-volatile semiconductor memory device and data erasing method therefor Jul 26, 1995 Issued
Array ( [id] => 3635140 [patent_doc_number] => 05608673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Nand-type flash memory integrated-circuit card' [patent_app_type] => 1 [patent_app_number] => 8/507689 [patent_app_country] => US [patent_app_date] => 1995-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 28 [patent_no_of_words] => 4261 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608673.pdf [firstpage_image] =>[orig_patent_app_number] => 507689 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/507689
Nand-type flash memory integrated-circuit card Jul 24, 1995 Issued
Array ( [id] => 3618088 [patent_doc_number] => 05590089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Address transition detection (ATD) circuit' [patent_app_type] => 1 [patent_app_number] => 8/506168 [patent_app_country] => US [patent_app_date] => 1995-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5330 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590089.pdf [firstpage_image] =>[orig_patent_app_number] => 506168 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506168
Address transition detection (ATD) circuit Jul 24, 1995 Issued
Array ( [id] => 3789098 [patent_doc_number] => 05808934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Integrated logic circuit and EEPROM' [patent_app_type] => 1 [patent_app_number] => 8/504116 [patent_app_country] => US [patent_app_date] => 1995-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 4207 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808934.pdf [firstpage_image] =>[orig_patent_app_number] => 504116 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504116
Integrated logic circuit and EEPROM Jul 18, 1995 Issued
Array ( [id] => 3631127 [patent_doc_number] => 05689466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Built in self test (BIST) for multiple RAMs' [patent_app_type] => 1 [patent_app_number] => 8/502574 [patent_app_country] => US [patent_app_date] => 1995-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2513 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689466.pdf [firstpage_image] =>[orig_patent_app_number] => 502574 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/502574
Built in self test (BIST) for multiple RAMs Jul 13, 1995 Issued
Array ( [id] => 3843873 [patent_doc_number] => 05740115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/498969 [patent_app_country] => US [patent_app_date] => 1995-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 10752 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740115.pdf [firstpage_image] =>[orig_patent_app_number] => 498969 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498969
Semiconductor memory device Jul 5, 1995 Issued
Array ( [id] => 4250945 [patent_doc_number] => 06081480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/483839 [patent_app_country] => US [patent_app_date] => 1995-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 638 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081480.pdf [firstpage_image] =>[orig_patent_app_number] => 483839 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483839
Semiconductor integrated circuit Jun 14, 1995 Issued
Array ( [id] => 3518937 [patent_doc_number] => 05587948 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Nonvolatile semiconductor memory with NAND structure memory arrays' [patent_app_type] => 1 [patent_app_number] => 8/490167 [patent_app_country] => US [patent_app_date] => 1995-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6169 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587948.pdf [firstpage_image] =>[orig_patent_app_number] => 490167 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490167
Nonvolatile semiconductor memory with NAND structure memory arrays Jun 13, 1995 Issued
08/490368 DATA STORAGE ELEMENT AND METHOD FOR RESTORING DATA Jun 13, 1995 Abandoned
Array ( [id] => 3544782 [patent_doc_number] => 05557574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Semiconductor memory device with function of carrying out logic judgement for correct recognition of memory operation' [patent_app_type] => 1 [patent_app_number] => 8/489764 [patent_app_country] => US [patent_app_date] => 1995-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3616 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557574.pdf [firstpage_image] =>[orig_patent_app_number] => 489764 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/489764
Semiconductor memory device with function of carrying out logic judgement for correct recognition of memory operation Jun 12, 1995 Issued
Array ( [id] => 4184404 [patent_doc_number] => RE036579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Sense circuit for reading data stored in nonvolatile memory cells' [patent_app_type] => 2 [patent_app_number] => 8/488718 [patent_app_country] => US [patent_app_date] => 1995-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3545 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 33 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036579.pdf [firstpage_image] =>[orig_patent_app_number] => 488718 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/488718
Sense circuit for reading data stored in nonvolatile memory cells Jun 7, 1995 Issued
Array ( [id] => 4373972 [patent_doc_number] => 06256233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Distributed signal drivers in arrayable devices' [patent_app_type] => 1 [patent_app_number] => 8/474856 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2416 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256233.pdf [firstpage_image] =>[orig_patent_app_number] => 474856 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474856
Distributed signal drivers in arrayable devices Jun 6, 1995 Issued
Array ( [id] => 3633087 [patent_doc_number] => 05602773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Memory device column address selection lead layout' [patent_app_type] => 1 [patent_app_number] => 8/477845 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2735 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/602/05602773.pdf [firstpage_image] =>[orig_patent_app_number] => 477845 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477845
Memory device column address selection lead layout Jun 6, 1995 Issued
Array ( [id] => 1546779 [patent_doc_number] => 06373737 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Content addressable memory' [patent_app_type] => B1 [patent_app_number] => 08/478429 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2721 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373737.pdf [firstpage_image] =>[orig_patent_app_number] => 08478429 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478429
Content addressable memory Jun 6, 1995 Issued
Array ( [id] => 3666981 [patent_doc_number] => 05659517 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Semiconductor memory device with an improved hierarchical power supply line configuration' [patent_app_type] => 1 [patent_app_number] => 8/486751 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 30 [patent_no_of_words] => 23192 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659517.pdf [firstpage_image] =>[orig_patent_app_number] => 486751 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486751
Semiconductor memory device with an improved hierarchical power supply line configuration Jun 5, 1995 Issued
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