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Jay Huang

Examiner (ID: 4119)

Most Active Art Unit
3685
Art Unit(s)
3685, 3619
Total Applications
545
Issued Applications
257
Pending Applications
70
Abandoned Applications
232

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3772465 [patent_doc_number] => 05742551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Memory circuit improved in electrical characteristics' [patent_app_type] => 1 [patent_app_number] => 8/463851 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 13833 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742551.pdf [firstpage_image] =>[orig_patent_app_number] => 463851 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463851
Memory circuit improved in electrical characteristics Jun 4, 1995 Issued
Array ( [id] => 3518972 [patent_doc_number] => 05587950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Test circuit in clock synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/461907 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 39 [patent_no_of_words] => 17791 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587950.pdf [firstpage_image] =>[orig_patent_app_number] => 461907 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461907
Test circuit in clock synchronous semiconductor memory device Jun 4, 1995 Issued
Array ( [id] => 3809222 [patent_doc_number] => 05828602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Memory system having multiple programmable reference cells' [patent_app_type] => 1 [patent_app_number] => 8/464016 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 45 [patent_no_of_words] => 13174 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828602.pdf [firstpage_image] =>[orig_patent_app_number] => 464016 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/464016
Memory system having multiple programmable reference cells Jun 4, 1995 Issued
Array ( [id] => 3697803 [patent_doc_number] => 05644542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Stress test for memory arrays in integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/460409 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644542.pdf [firstpage_image] =>[orig_patent_app_number] => 460409 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/460409
Stress test for memory arrays in integrated circuits Jun 1, 1995 Issued
Array ( [id] => 3565126 [patent_doc_number] => 05500831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-19 [patent_title] => 'RAS encoded generator for a memory bank' [patent_app_type] => 1 [patent_app_number] => 8/458940 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3463 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/500/05500831.pdf [firstpage_image] =>[orig_patent_app_number] => 458940 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/458940
RAS encoded generator for a memory bank Jun 1, 1995 Issued
Array ( [id] => 4054824 [patent_doc_number] => 05875148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/454118 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7345 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875148.pdf [firstpage_image] =>[orig_patent_app_number] => 454118 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/454118
Semiconductor memory Jun 1, 1995 Issued
Array ( [id] => 3988552 [patent_doc_number] => 05917752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/457761 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 69 [patent_no_of_words] => 39647 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 518 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917752.pdf [firstpage_image] =>[orig_patent_app_number] => 457761 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/457761
Nonvolatile semiconductor memory device May 31, 1995 Issued
Array ( [id] => 3705222 [patent_doc_number] => 05619459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'On-chip mobile ion contamination test circuit' [patent_app_type] => 1 [patent_app_number] => 8/455833 [patent_app_country] => US [patent_app_date] => 1995-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2166 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619459.pdf [firstpage_image] =>[orig_patent_app_number] => 455833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/455833
On-chip mobile ion contamination test circuit May 30, 1995 Issued
08/453433 METHOD FOR ERASING AN EEPROM FLASH MEMORY CELL AND CORRESPONDING ERASING CIRCUIT May 29, 1995 Abandoned
08/453268 SEMICONDUCTOR MEMORY DEVICE May 29, 1995 Abandoned
08/450431 TEST COVERAGE OF EMBEDDED MEMORIES ON SEMICONDUCTOR SUBSTRATES May 24, 1995 Abandoned
Array ( [id] => 3560732 [patent_doc_number] => 05572465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Power supply configured sensing scheme for flash EEPROM' [patent_app_type] => 1 [patent_app_number] => 8/451037 [patent_app_country] => US [patent_app_date] => 1995-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2654 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572465.pdf [firstpage_image] =>[orig_patent_app_number] => 451037 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/451037
Power supply configured sensing scheme for flash EEPROM May 24, 1995 Issued
Array ( [id] => 1470021 [patent_doc_number] => 06459623 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'EEPROM erasing method' [patent_app_type] => B1 [patent_app_number] => 08/450553 [patent_app_country] => US [patent_app_date] => 1995-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4947 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459623.pdf [firstpage_image] =>[orig_patent_app_number] => 08450553 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/450553
EEPROM erasing method May 24, 1995 Issued
Array ( [id] => 3712527 [patent_doc_number] => 05646886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Flash memory having segmented array for improved operation' [patent_app_type] => 1 [patent_app_number] => 8/449564 [patent_app_country] => US [patent_app_date] => 1995-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646886.pdf [firstpage_image] =>[orig_patent_app_number] => 449564 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/449564
Flash memory having segmented array for improved operation May 23, 1995 Issued
08/440169 SECTOR ARCHITECTURE FOR FLASH MEMORY DEVICE May 11, 1995 Abandoned
Array ( [id] => 3727797 [patent_doc_number] => 05617369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Dynamic semiconductor memory device having excellent charge retention characteristics' [patent_app_type] => 1 [patent_app_number] => 8/438730 [patent_app_country] => US [patent_app_date] => 1995-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 71 [patent_no_of_words] => 33913 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617369.pdf [firstpage_image] =>[orig_patent_app_number] => 438730 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/438730
Dynamic semiconductor memory device having excellent charge retention characteristics May 9, 1995 Issued
Array ( [id] => 3537333 [patent_doc_number] => 05541883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'Method and apparatus for simultaneous long writes of multiple cells of a row in a static ram' [patent_app_type] => 1 [patent_app_number] => 8/437534 [patent_app_country] => US [patent_app_date] => 1995-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4510 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/541/05541883.pdf [firstpage_image] =>[orig_patent_app_number] => 437534 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/437534
Method and apparatus for simultaneous long writes of multiple cells of a row in a static ram May 8, 1995 Issued
Array ( [id] => 3546807 [patent_doc_number] => 05495442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-27 [patent_title] => 'Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells' [patent_app_type] => 1 [patent_app_number] => 8/434970 [patent_app_country] => US [patent_app_date] => 1995-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/495/05495442.pdf [firstpage_image] =>[orig_patent_app_number] => 434970 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/434970
Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells May 3, 1995 Issued
Array ( [id] => 3507636 [patent_doc_number] => 05532964 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells' [patent_app_type] => 1 [patent_app_number] => 8/434969 [patent_app_country] => US [patent_app_date] => 1995-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7034 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532964.pdf [firstpage_image] =>[orig_patent_app_number] => 434969 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/434969
Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells May 3, 1995 Issued
Array ( [id] => 3553738 [patent_doc_number] => 05555217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Semiconductor memory device having presetting function sense amplifier' [patent_app_type] => 1 [patent_app_number] => 8/434403 [patent_app_country] => US [patent_app_date] => 1995-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 7858 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555217.pdf [firstpage_image] =>[orig_patent_app_number] => 434403 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/434403
Semiconductor memory device having presetting function sense amplifier May 2, 1995 Issued
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