Search

Jay W. Radke

Examiner (ID: 3459, Phone: (571)270-1622 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
1157
Issued Applications
986
Pending Applications
68
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14937799 [patent_doc_number] => 20190304538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => IN-CELL DIFFERENTIAL READ-OUT CIRCUITRY FOR READING SIGNED WEIGHT VALUES IN RESISTIVE PROCESSING UNIT ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/352230 [patent_app_country] => US [patent_app_date] => 2019-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16352230 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/352230
In-cell differential read-out circuitry for reading signed weight values in resistive processing unit architecture Mar 12, 2019 Issued
Array ( [id] => 14784365 [patent_doc_number] => 20190267080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => Block Management for Dynamic Single-Level Cell Buffers in Storage Devices [patent_app_type] => utility [patent_app_number] => 16/288268 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288268
Block management for dynamic single-level cell buffers in storage devices Feb 27, 2019 Issued
Array ( [id] => 16417600 [patent_doc_number] => 10825500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Data storage in synthetic antiferromagnets included in magnetic tunnel junctions [patent_app_type] => utility [patent_app_number] => 16/286793 [patent_app_country] => US [patent_app_date] => 2019-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16286793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/286793
Data storage in synthetic antiferromagnets included in magnetic tunnel junctions Feb 26, 2019 Issued
Array ( [id] => 14919943 [patent_doc_number] => 10431298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Nonvolatile memory and writing method [patent_app_type] => utility [patent_app_number] => 16/286056 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 57 [patent_no_of_words] => 19386 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 749 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16286056 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/286056
Nonvolatile memory and writing method Feb 25, 2019 Issued
Array ( [id] => 14475133 [patent_doc_number] => 20190189213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/283239 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283239
Semiconductor storage device Feb 21, 2019 Issued
Array ( [id] => 14351159 [patent_doc_number] => 20190157552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => THREE-TERMINAL METASTABLE SYMMETRIC ZERO-VOLT BATTERY MEMRISTIVE DEVICE [patent_app_type] => utility [patent_app_number] => 16/241284 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241284 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/241284
Three-terminal metastable symmetric zero-volt battery memristive device Jan 6, 2019 Issued
Array ( [id] => 14234569 [patent_doc_number] => 20190129457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => SEMICONDUCTOR DEVICES HAVING VOLTAGE GENERATORS USING WEIGHTED COMBINATION OF FEEDBACK VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/234168 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/234168
Semiconductor devices having voltage generators using weighted combination of feedback voltages Dec 26, 2018 Issued
Array ( [id] => 15045123 [patent_doc_number] => 20190333566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MEMORY CONTROLLER FOR CONTROLLING REFRESH OPERATION AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/233510 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16233510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/233510
Memory controller for controlling refresh operation and memory system including the same Dec 26, 2018 Issued
Array ( [id] => 17070421 [patent_doc_number] => 20210272638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => REDUCED-PASS ERASE VERIFY FOR NONVOLATILE STORAGE MEDIA [patent_app_type] => utility [patent_app_number] => 17/253095 [patent_app_country] => US [patent_app_date] => 2018-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17253095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/253095
REDUCED-PASS ERASE VERIFY FOR NONVOLATILE STORAGE MEDIA Dec 24, 2018 Abandoned
Array ( [id] => 15759871 [patent_doc_number] => 10622062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => 2T-1R architecture for resistive ram [patent_app_type] => utility [patent_app_number] => 16/224206 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 64 [patent_no_of_words] => 12956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16224206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/224206
2T-1R architecture for resistive ram Dec 17, 2018 Issued
Array ( [id] => 16020341 [patent_doc_number] => 20200185014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => Wordline Decoder Circuitry [patent_app_type] => utility [patent_app_number] => 16/213832 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213832
Wordline decoder circuitry Dec 6, 2018 Issued
Array ( [id] => 16536284 [patent_doc_number] => 10878897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => System and method for storing and retrieving multibit data in non-volatile memory using current multipliers [patent_app_type] => utility [patent_app_number] => 16/213860 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213860
System and method for storing and retrieving multibit data in non-volatile memory using current multipliers Dec 6, 2018 Issued
Array ( [id] => 14874673 [patent_doc_number] => 20190287578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY APPARATUS USING THE SENSE AMPLIFIER [patent_app_type] => utility [patent_app_number] => 16/201426 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201426 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201426
Sense amplifier and semiconductor memory apparatus using the sense amplifier Nov 26, 2018 Issued
Array ( [id] => 16788969 [patent_doc_number] => 10991406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Method, system and device for magnetic memory [patent_app_type] => utility [patent_app_number] => 16/200276 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12161 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200276
Method, system and device for magnetic memory Nov 25, 2018 Issued
Array ( [id] => 17270556 [patent_doc_number] => 11195988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/195483 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 13135 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195483
Electronic device and method for fabricating the same Nov 18, 2018 Issued
Array ( [id] => 16759571 [patent_doc_number] => 10978126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Ground reference scheme for a memory cell [patent_app_type] => utility [patent_app_number] => 16/184480 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 14222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184480
Ground reference scheme for a memory cell Nov 7, 2018 Issued
Array ( [id] => 15169541 [patent_doc_number] => 10490273 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Linearly weight updatable CMOS synaptic array without cell location dependence [patent_app_type] => utility [patent_app_number] => 16/171638 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 42 [patent_no_of_words] => 7224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16171638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/171638
Linearly weight updatable CMOS synaptic array without cell location dependence Oct 25, 2018 Issued
Array ( [id] => 16645307 [patent_doc_number] => 10923171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor device performing refresh operation in deep sleep mode [patent_app_type] => utility [patent_app_number] => 16/163422 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5558 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/163422
Semiconductor device performing refresh operation in deep sleep mode Oct 16, 2018 Issued
Array ( [id] => 15806923 [patent_doc_number] => 20200126604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => BOOST GENERATION CIRCUITRY FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/162592 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162592
Boost generation circuitry for memory Oct 16, 2018 Issued
Array ( [id] => 16566644 [patent_doc_number] => 10892018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Semiconductor memory device and refreshing method of semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/152148 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6488 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152148 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152148
Semiconductor memory device and refreshing method of semiconductor memory device Oct 3, 2018 Issued
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