Search

Jean Bruner Jeanglaude

Examiner (ID: 8702, Phone: (571)272-1804 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2735, 2845, 2819
Total Applications
2813
Issued Applications
2600
Pending Applications
139
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17623928 [patent_doc_number] => 11342998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Linearized optical digital-to-analog modulator [patent_app_type] => utility [patent_app_number] => 17/481904 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 8917 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481904
Linearized optical digital-to-analog modulator Sep 21, 2021 Issued
Array ( [id] => 18913524 [patent_doc_number] => 11876519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Oscillation circuit, time-to-digital converter, and electronic device [patent_app_type] => utility [patent_app_number] => 17/468431 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6236 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468431 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468431
Oscillation circuit, time-to-digital converter, and electronic device Sep 6, 2021 Issued
Array ( [id] => 18640174 [patent_doc_number] => 11764806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Data compression system and method of using [patent_app_type] => utility [patent_app_number] => 17/467282 [patent_app_country] => US [patent_app_date] => 2021-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467282
Data compression system and method of using Sep 5, 2021 Issued
Array ( [id] => 18529089 [patent_doc_number] => 11716095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Channel-parallel compression with random memory access [patent_app_type] => utility [patent_app_number] => 17/465841 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 49 [patent_no_of_words] => 23693 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465841 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465841
Channel-parallel compression with random memory access Sep 1, 2021 Issued
Array ( [id] => 18089235 [patent_doc_number] => 11539376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Isolator [patent_app_type] => utility [patent_app_number] => 17/463315 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12724 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463315
Isolator Aug 30, 2021 Issued
Array ( [id] => 17674863 [patent_doc_number] => 20220188030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => APPARATUS FOR PROCESSING RECEIVED DATA [patent_app_type] => utility [patent_app_number] => 17/462549 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462549
Apparatus for processing received data Aug 30, 2021 Issued
Array ( [id] => 18106090 [patent_doc_number] => 11545996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-03 [patent_title] => Low-noise, high-accuracy single-ended input stage for continuous-time sigma delta (CTSD) analog-to-digital converter (ADC) [patent_app_type] => utility [patent_app_number] => 17/410163 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410163
Low-noise, high-accuracy single-ended input stage for continuous-time sigma delta (CTSD) analog-to-digital converter (ADC) Aug 23, 2021 Issued
Array ( [id] => 18212377 [patent_doc_number] => 20230058641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => ANALOG-TO-DIGITAL CONVERSION WITH BIT SKIPPING FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 17/406704 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406704
Analog-to-digital conversion with bit skipping functionality Aug 18, 2021 Issued
Array ( [id] => 18212377 [patent_doc_number] => 20230058641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => ANALOG-TO-DIGITAL CONVERSION WITH BIT SKIPPING FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 17/406704 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406704
Analog-to-digital conversion with bit skipping functionality Aug 18, 2021 Issued
Array ( [id] => 18131843 [patent_doc_number] => 11558061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => ADC self-calibration with on-chip circuit and method [patent_app_type] => utility [patent_app_number] => 17/404658 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404658
ADC self-calibration with on-chip circuit and method Aug 16, 2021 Issued
Array ( [id] => 17358825 [patent_doc_number] => 20220019621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => DATA STORAGE BASED ON ENCODED DNA SEQUENCES [patent_app_type] => utility [patent_app_number] => 17/403791 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/403791
Data storage based on encoded DNA sequences Aug 15, 2021 Issued
Array ( [id] => 18156836 [patent_doc_number] => 11569837 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-31 [patent_title] => Output common-mode control for dynamic amplifiers [patent_app_type] => utility [patent_app_number] => 17/403683 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13426 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/403683
Output common-mode control for dynamic amplifiers Aug 15, 2021 Issued
Array ( [id] => 17403602 [patent_doc_number] => 20220045693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => SYSTEM AND METHOD FOR DYNAMIC ELEMENT MATCHING FOR DELTA SIGMA CONVERTERS [patent_app_type] => utility [patent_app_number] => 17/395902 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395902 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395902
System and method for dynamic element matching for delta sigma converters Aug 5, 2021 Issued
Array ( [id] => 18165033 [patent_doc_number] => 20230031630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => GATED RING OSCILLATOR LINEARIZATION [patent_app_type] => utility [patent_app_number] => 17/390291 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390291 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390291
Gated ring oscillator linearization Jul 29, 2021 Issued
Array ( [id] => 18834501 [patent_doc_number] => 20230403028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => PARALLELIZED DECODING OF VARIABLE-LENGTH PREFIX CODES [patent_app_type] => utility [patent_app_number] => 18/034832 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18034832 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/034832
Parallelized decoding of variable-length prefix codes Jul 26, 2021 Issued
Array ( [id] => 17765698 [patent_doc_number] => 20220239312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => DIGITAL FILTER FOR A DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER [patent_app_type] => utility [patent_app_number] => 17/381460 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381460
Digital filter for a delta-sigma analog-to-digital converter Jul 20, 2021 Issued
Array ( [id] => 17204008 [patent_doc_number] => 20210344103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => Communication Device [patent_app_type] => utility [patent_app_number] => 17/375689 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375689
Communication device Jul 13, 2021 Issued
Array ( [id] => 17417803 [patent_doc_number] => 20220052707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => ANALOG FRONT-END CIRCUIT CAPABLE OF USE IN A SENSOR SYSTEM [patent_app_type] => utility [patent_app_number] => 17/305627 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17305627 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/305627
Analog front-end circuit capable of use in a sensor system Jul 11, 2021 Issued
Array ( [id] => 19277955 [patent_doc_number] => 12028089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Circuit apparatus for converting digital signals to analog signals including different mode driver circuits [patent_app_type] => utility [patent_app_number] => 17/371011 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371011
Circuit apparatus for converting digital signals to analog signals including different mode driver circuits Jul 7, 2021 Issued
Array ( [id] => 17174922 [patent_doc_number] => 20210328593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => FILE SYSTEM FORMAT FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 17/364946 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364946
File system format for persistent memory Jun 30, 2021 Issued
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