Search

Jean Bruner Jeanglaude

Examiner (ID: 11123, Phone: (571)272-1804 , Office: P/2845 )

Most Active Art Unit
2845
Art Unit(s)
2819, 2735, 2845
Total Applications
2831
Issued Applications
2610
Pending Applications
136
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17653362 [patent_doc_number] => 11356110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-07 [patent_title] => Voltage-to-time converter architecture for time-domain analog-to-digital converter [patent_app_type] => utility [patent_app_number] => 17/328716 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3611 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328716
Voltage-to-time converter architecture for time-domain analog-to-digital converter May 23, 2021 Issued
Array ( [id] => 18563569 [patent_doc_number] => 11728826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Compression and decompression in hardware for data processing [patent_app_type] => utility [patent_app_number] => 17/328452 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12307 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328452
Compression and decompression in hardware for data processing May 23, 2021 Issued
Array ( [id] => 17523604 [patent_doc_number] => 20220109453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => PARALLEL DECODING TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/325941 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325941 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325941
Parallel decoding techniques May 19, 2021 Issued
Array ( [id] => 17303899 [patent_doc_number] => 20210399738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => SIGMA-DELTA ANALOGUE TO DIGITAL CONVERTER [patent_app_type] => utility [patent_app_number] => 17/322212 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322212 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322212
Sigma-delta analogue to digital converter May 16, 2021 Issued
Array ( [id] => 17600284 [patent_doc_number] => 20220149858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => Successive-Approximation-Register (SAR) Analog-to-Digital Converter (ADC) Timing Calibration [patent_app_type] => utility [patent_app_number] => 17/322869 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322869
Successive-approximation-register (SAR) analog-to-digital converter (ADC) timing calibration May 16, 2021 Issued
Array ( [id] => 17803893 [patent_doc_number] => 11418210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Digital-to-analog converter with reference voltage selection switch [patent_app_type] => utility [patent_app_number] => 17/308480 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7894 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308480
Digital-to-analog converter with reference voltage selection switch May 4, 2021 Issued
Array ( [id] => 17173252 [patent_doc_number] => 20210326923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => GRAPH-BASED COMPRESSION OF DATA RECORDS [patent_app_type] => utility [patent_app_number] => 17/302296 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/302296
Graph-based compression of data records Apr 28, 2021 Issued
Array ( [id] => 17439675 [patent_doc_number] => 11265020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Electronic device with bit pattern generation, integrated circuit and method for polar coding [patent_app_type] => utility [patent_app_number] => 17/240080 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 22938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/240080
Electronic device with bit pattern generation, integrated circuit and method for polar coding Apr 25, 2021 Issued
Array ( [id] => 17731439 [patent_doc_number] => 11387843 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-12 [patent_title] => Method and apparatus for encoding and decoding of floating-point number [patent_app_type] => utility [patent_app_number] => 17/238226 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5827 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238226
Method and apparatus for encoding and decoding of floating-point number Apr 22, 2021 Issued
Array ( [id] => 17848615 [patent_doc_number] => 11438004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Analog to digital converter with inverter based amplifier [patent_app_type] => utility [patent_app_number] => 17/227949 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227949 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227949
Analog to digital converter with inverter based amplifier Apr 11, 2021 Issued
Array ( [id] => 17456705 [patent_doc_number] => 11271576 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-08 [patent_title] => Digital-to-analog converter (DAC) with common-mode correction [patent_app_type] => utility [patent_app_number] => 17/223559 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8313 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223559 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223559
Digital-to-analog converter (DAC) with common-mode correction Apr 5, 2021 Issued
Array ( [id] => 18137751 [patent_doc_number] => 11563446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-01-24 [patent_title] => Efficient generalized boundary detection [patent_app_type] => utility [patent_app_number] => 17/219217 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7007 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219217
Efficient generalized boundary detection Mar 30, 2021 Issued
Array ( [id] => 17683900 [patent_doc_number] => 11368166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Efficient encoding methods using bit inversion and padding bits [patent_app_type] => utility [patent_app_number] => 17/218063 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 23730 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218063 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218063
Efficient encoding methods using bit inversion and padding bits Mar 29, 2021 Issued
Array ( [id] => 17683899 [patent_doc_number] => 11368165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Converter circuit, corresponding device and offset compensation method [patent_app_type] => utility [patent_app_number] => 17/211355 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11635 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211355
Converter circuit, corresponding device and offset compensation method Mar 23, 2021 Issued
Array ( [id] => 18730141 [patent_doc_number] => 20230344439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER FOR WIDE SAMPLING RATE [patent_app_type] => utility [patent_app_number] => 17/433031 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17433031 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/433031
Successive approximation register analog-to-digital converter for wide sampling rate Mar 18, 2021 Issued
Array ( [id] => 17746304 [patent_doc_number] => 11394394 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-19 [patent_title] => Signal chain with current output gain stage followed by current input ADC [patent_app_type] => utility [patent_app_number] => 17/204207 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4720 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204207 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204207
Signal chain with current output gain stage followed by current input ADC Mar 16, 2021 Issued
Array ( [id] => 17100867 [patent_doc_number] => 20210288658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => DIGITAL-TO-ANALOG CONVERTER SYSTEM AND METHOD OF OPERATION [patent_app_type] => utility [patent_app_number] => 17/202108 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202108
Digital-to-analog converter system and method of operation Mar 14, 2021 Issued
Array ( [id] => 17651103 [patent_doc_number] => 11353828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Latched gray code for ToF applications [patent_app_type] => utility [patent_app_number] => 17/201994 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 6026 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201994
Latched gray code for ToF applications Mar 14, 2021 Issued
Array ( [id] => 17942375 [patent_doc_number] => 11476841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Analog-to-digital converter, phase sampler, time-to-digital converter, and flip-flop [patent_app_type] => utility [patent_app_number] => 17/198515 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 10832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198515
Analog-to-digital converter, phase sampler, time-to-digital converter, and flip-flop Mar 10, 2021 Issued
Array ( [id] => 17494140 [patent_doc_number] => 11283464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Compression and decompression engines and compressed domain processors [patent_app_type] => utility [patent_app_number] => 17/249740 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 34751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249740 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/249740
Compression and decompression engines and compressed domain processors Mar 10, 2021 Issued
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