Search

Jeff B. Vockrodt

Examiner (ID: 4113)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
249
Issued Applications
219
Pending Applications
5
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1324308 [patent_doc_number] => 06602775 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Method to improve reliability for flip-chip device for limiting pad design' [patent_app_type] => B1 [patent_app_number] => 09/930677 [patent_app_country] => US [patent_app_date] => 2001-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1741 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602775.pdf [firstpage_image] =>[orig_patent_app_number] => 09930677 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/930677
Method to improve reliability for flip-chip device for limiting pad design Aug 15, 2001 Issued
Array ( [id] => 1415979 [patent_doc_number] => 06518143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Method for fabricating a lower plate for a capacitor of semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/928657 [patent_app_country] => US [patent_app_date] => 2001-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3182 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/518/06518143.pdf [firstpage_image] =>[orig_patent_app_number] => 09928657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/928657
Method for fabricating a lower plate for a capacitor of semiconductor device Aug 13, 2001 Issued
Array ( [id] => 6688578 [patent_doc_number] => 20030032303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Ozone-enhanced oxidation for high-k dielectric semiconductor devices' [patent_app_type] => new [patent_app_number] => 09/928377 [patent_app_country] => US [patent_app_date] => 2001-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032303.pdf [firstpage_image] =>[orig_patent_app_number] => 09928377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/928377
Ozone-enhanced oxidation for high-k dielectric semiconductor devices Aug 12, 2001 Issued
Array ( [id] => 5873991 [patent_doc_number] => 20020048835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Method for manufacturing semiconducter laser diode' [patent_app_type] => new [patent_app_number] => 09/925327 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3244 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20020048835.pdf [firstpage_image] =>[orig_patent_app_number] => 09925327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925327
Method for manufacturing semiconductor laser diode Aug 9, 2001 Issued
Array ( [id] => 5999952 [patent_doc_number] => 20020028522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-07 [patent_title] => 'Electrostatic discharge protection device having a graded junction and method for forming the same' [patent_app_type] => new [patent_app_number] => 09/927275 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5602 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20020028522.pdf [firstpage_image] =>[orig_patent_app_number] => 09927275 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927275
Electrostatic discharge protection device having a graded junction and method for forming the same Aug 8, 2001 Issued
Array ( [id] => 6688574 [patent_doc_number] => 20030032299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method of aligning structures on opposite sides of a wafer' [patent_app_type] => new [patent_app_number] => 09/923367 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5178 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032299.pdf [firstpage_image] =>[orig_patent_app_number] => 09923367 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/923367
Method of aligning structures on opposite sides of a wafer Aug 7, 2001 Issued
Array ( [id] => 1368900 [patent_doc_number] => 06570248 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Structure and method for a high-performance electronic packaging assembly' [patent_app_type] => B1 [patent_app_number] => 09/924303 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3628 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570248.pdf [firstpage_image] =>[orig_patent_app_number] => 09924303 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/924303
Structure and method for a high-performance electronic packaging assembly Aug 7, 2001 Issued
Array ( [id] => 1578073 [patent_doc_number] => 06448126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method of forming an embedded memory' [patent_app_type] => B1 [patent_app_number] => 09/682217 [patent_app_country] => US [patent_app_date] => 2001-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4482 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448126.pdf [firstpage_image] =>[orig_patent_app_number] => 09682217 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682217
Method of forming an embedded memory Aug 6, 2001 Issued
Array ( [id] => 1389347 [patent_doc_number] => 06544815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-08 [patent_title] => 'Panel stacking of BGA devices to form three-dimensional modules' [patent_app_type] => B2 [patent_app_number] => 09/922977 [patent_app_country] => US [patent_app_date] => 2001-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 7691 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/544/06544815.pdf [firstpage_image] =>[orig_patent_app_number] => 09922977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922977
Panel stacking of BGA devices to form three-dimensional modules Aug 5, 2001 Issued
Array ( [id] => 1401335 [patent_doc_number] => 06534350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Method for fabricating a low temperature polysilicon thin film transistor incorporating channel passivation step' [patent_app_type] => B2 [patent_app_number] => 09/920877 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4298 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534350.pdf [firstpage_image] =>[orig_patent_app_number] => 09920877 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/920877
Method for fabricating a low temperature polysilicon thin film transistor incorporating channel passivation step Aug 1, 2001 Issued
Array ( [id] => 1245625 [patent_doc_number] => 06677169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Method and system for backside device analysis on a ball grid array package' [patent_app_type] => B1 [patent_app_number] => 09/922417 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2408 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677169.pdf [firstpage_image] =>[orig_patent_app_number] => 09922417 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922417
Method and system for backside device analysis on a ball grid array package Aug 1, 2001 Issued
Array ( [id] => 6716071 [patent_doc_number] => 20030027419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Tri-tone photomask to form dual damascene structures' [patent_app_type] => new [patent_app_number] => 09/921257 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3385 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20030027419.pdf [firstpage_image] =>[orig_patent_app_number] => 09921257 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/921257
Tri-tone photomask to form dual damascene structures Aug 1, 2001 Abandoned
Array ( [id] => 1220466 [patent_doc_number] => 06703265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-09 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/918547 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 56 [patent_no_of_words] => 17436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703265.pdf [firstpage_image] =>[orig_patent_app_number] => 09918547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/918547
Semiconductor device and method of manufacturing the same Jul 31, 2001 Issued
Array ( [id] => 6745275 [patent_doc_number] => 20030022458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-30 [patent_title] => 'Method for forming a shallow trench isolation in a semiconductor structure' [patent_app_type] => new [patent_app_number] => 09/916627 [patent_app_country] => US [patent_app_date] => 2001-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1563 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20030022458.pdf [firstpage_image] =>[orig_patent_app_number] => 09916627 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/916627
Method for forming a shallow trench isolation in a semiconductor structure Jul 26, 2001 Abandoned
Array ( [id] => 5844550 [patent_doc_number] => 20020132430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Method for producing metallic bit lines for memory cell arrays, method for producing memory cell arrays and memory cell array' [patent_app_type] => new [patent_app_number] => 09/917867 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5362 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132430.pdf [firstpage_image] =>[orig_patent_app_number] => 09917867 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/917867
Method for producing metallic bit lines for memory cell arrays, method for producing memory cell arrays and memory cell array Jul 25, 2001 Issued
Array ( [id] => 6713798 [patent_doc_number] => 20030025146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Processes for making a barrier between a dielectric and a conductor and products produced therefrom' [patent_app_type] => new [patent_app_number] => 09/911947 [patent_app_country] => US [patent_app_date] => 2001-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8603 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025146.pdf [firstpage_image] =>[orig_patent_app_number] => 09911947 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/911947
Processes for making a barrier between a dielectric and a conductor and products produced therefrom Jul 22, 2001 Issued
Array ( [id] => 6735618 [patent_doc_number] => 20030013253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Optimized flash memory cell' [patent_app_type] => new [patent_app_number] => 09/905517 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20030013253.pdf [firstpage_image] =>[orig_patent_app_number] => 09905517 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/905517
Optimized flash memory cell Jul 12, 2001 Issued
Array ( [id] => 1358491 [patent_doc_number] => 06573139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Method of fabricating cell of flash memory device' [patent_app_type] => B2 [patent_app_number] => 09/903977 [patent_app_country] => US [patent_app_date] => 2001-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3377 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573139.pdf [firstpage_image] =>[orig_patent_app_number] => 09903977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/903977
Method of fabricating cell of flash memory device Jul 11, 2001 Issued
Array ( [id] => 1212761 [patent_doc_number] => 06709950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/902157 [patent_app_country] => US [patent_app_date] => 2001-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 76 [patent_no_of_words] => 18100 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709950.pdf [firstpage_image] =>[orig_patent_app_number] => 09902157 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/902157
Semiconductor device and method of manufacturing the same Jul 10, 2001 Issued
Array ( [id] => 1518942 [patent_doc_number] => 06501143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-31 [patent_title] => 'Spin-valve transistor' [patent_app_type] => B2 [patent_app_number] => 09/893447 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4376 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501143.pdf [firstpage_image] =>[orig_patent_app_number] => 09893447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/893447
Spin-valve transistor Jun 28, 2001 Issued
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