Search

Jeff Banthrongsack

Examiner (ID: 15425, Phone: (571)270-7090 , Office: P/2462 )

Most Active Art Unit
2462
Art Unit(s)
2462
Total Applications
378
Issued Applications
288
Pending Applications
1
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11095017 [patent_doc_number] => 20160291985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'COMMUNICATION INTERFACE INITIALIZATION' [patent_app_type] => utility [patent_app_number] => 14/675531 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5283 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675531 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675531
Communication interface initialization Mar 30, 2015 Issued
Array ( [id] => 14766129 [patent_doc_number] => 10394460 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-27 [patent_title] => Enhanced data buffer and intelligent NV controller for simultaneous DRAM and flash memory access [patent_app_type] => utility [patent_app_number] => 14/675591 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3362 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675591 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675591
Enhanced data buffer and intelligent NV controller for simultaneous DRAM and flash memory access Mar 30, 2015 Issued
Array ( [id] => 16644371 [patent_doc_number] => 10922228 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-16 [patent_title] => Multiple location index [patent_app_type] => utility [patent_app_number] => 14/674911 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8124 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674911 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/674911
Multiple location index Mar 30, 2015 Issued
Array ( [id] => 15638257 [patent_doc_number] => 10592122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Inherent adaptive trimming [patent_app_type] => utility [patent_app_number] => 14/675261 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675261
Inherent adaptive trimming Mar 30, 2015 Issued
Array ( [id] => 12173703 [patent_doc_number] => 09891846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'System and method for preventing solid state drive corruption after dirty shutdown power loss' [patent_app_type] => utility [patent_app_number] => 14/675299 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3766 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675299 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675299
System and method for preventing solid state drive corruption after dirty shutdown power loss Mar 30, 2015 Issued
Array ( [id] => 14122923 [patent_doc_number] => 10248319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Storage pool capacity management [patent_app_type] => utility [patent_app_number] => 14/675151 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8147 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675151
Storage pool capacity management Mar 30, 2015 Issued
Array ( [id] => 12114164 [patent_doc_number] => 09870157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Command balancing and interleaving for write and reads between front end and back end of solid state drive' [patent_app_type] => utility [patent_app_number] => 14/675526 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6278 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675526 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675526
Command balancing and interleaving for write and reads between front end and back end of solid state drive Mar 30, 2015 Issued
Array ( [id] => 13029079 [patent_doc_number] => 10037159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 14/674903 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 15499 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674903 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/674903
Memory system and operating method thereof Mar 30, 2015 Issued
Array ( [id] => 10602895 [patent_doc_number] => 09323459 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-26 [patent_title] => 'Techniques for dynamic data storage configuration in accordance with an allocation policy' [patent_app_type] => utility [patent_app_number] => 14/636515 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14636515 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/636515
Techniques for dynamic data storage configuration in accordance with an allocation policy Mar 2, 2015 Issued
Array ( [id] => 10982588 [patent_doc_number] => 20160179532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'MANAGING ALLOCATION OF PHYSICAL REGISTERS IN A BLOCK-BASED INSTRUCTION SET ARCHITECTURE (ISA), AND RELATED APPARATUSES AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/578913 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8778 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/578913
MANAGING ALLOCATION OF PHYSICAL REGISTERS IN A BLOCK-BASED INSTRUCTION SET ARCHITECTURE (ISA), AND RELATED APPARATUSES AND METHODS Dec 21, 2014 Abandoned
Array ( [id] => 11523336 [patent_doc_number] => 09606734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Two-level hierarchical log structured array architecture using coordinated garbage collection for flash arrays' [patent_app_type] => utility [patent_app_number] => 14/578864 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578864 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/578864
Two-level hierarchical log structured array architecture using coordinated garbage collection for flash arrays Dec 21, 2014 Issued
Array ( [id] => 10575731 [patent_doc_number] => 09298371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-29 [patent_title] => 'System and method of reducing write cycles and increasing longevity of non-volatile memory in baseboard management controller (BMC)' [patent_app_type] => utility [patent_app_number] => 14/579150 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8482 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579150 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/579150
System and method of reducing write cycles and increasing longevity of non-volatile memory in baseboard management controller (BMC) Dec 21, 2014 Issued
Array ( [id] => 10630598 [patent_doc_number] => 09348748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Heal leveling' [patent_app_type] => utility [patent_app_number] => 14/578820 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8200 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578820 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/578820
Heal leveling Dec 21, 2014 Issued
Array ( [id] => 12046370 [patent_doc_number] => 09823973 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-21 [patent_title] => 'Creating consistent snapshots in a virtualized environment' [patent_app_type] => utility [patent_app_number] => 14/578663 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578663 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/578663
Creating consistent snapshots in a virtualized environment Dec 21, 2014 Issued
Array ( [id] => 10204155 [patent_doc_number] => 20150089143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'Method and Apparatus for Saving Power by Efficiently Disabling Ways for a Set-Associative Cache' [patent_app_type] => utility [patent_app_number] => 14/557474 [patent_app_country] => US [patent_app_date] => 2014-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10426 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14557474 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/557474
Method and apparatus for saving power by efficiently disabling ways for a set-associative cache Dec 1, 2014 Issued
Array ( [id] => 10778489 [patent_doc_number] => 20160124645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'VISUALIZATIONS OF MEMORY LAYOUTS IN SOFTWARE PROGRAMS' [patent_app_type] => utility [patent_app_number] => 14/533948 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533948 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/533948
Visualizations of memory layouts in software programs Nov 4, 2014 Issued
Array ( [id] => 10258044 [patent_doc_number] => 20150143041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'STORAGE CONTROL APPARATUS AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/533465 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9239 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533465 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/533465
STORAGE CONTROL APPARATUS AND CONTROL METHOD Nov 4, 2014 Abandoned
Array ( [id] => 15887365 [patent_doc_number] => 10650027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Access accelerator for active HBase database regions [patent_app_type] => utility [patent_app_number] => 14/533380 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533380 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/533380
Access accelerator for active HBase database regions Nov 4, 2014 Issued
Array ( [id] => 15373071 [patent_doc_number] => 10528253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Increased bandwidth of ordered stores in a non-uniform memory subsystem [patent_app_type] => utility [patent_app_number] => 14/533579 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7821 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533579 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/533579
Increased bandwidth of ordered stores in a non-uniform memory subsystem Nov 4, 2014 Issued
Array ( [id] => 10249923 [patent_doc_number] => 20150134919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND DATA ACCESS METHOD' [patent_app_type] => utility [patent_app_number] => 14/533601 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15051 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533601 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/533601
INFORMATION PROCESSING APPARATUS AND DATA ACCESS METHOD Nov 4, 2014 Abandoned
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