Search

Jeffery A. Brier

Examiner (ID: 12031, Phone: (571)272-7656 , Office: P/2613 )

Most Active Art Unit
2613
Art Unit(s)
2628, 2604, 2779, 2773, 2611, 2606, 2678, 2615, 2415, 2609, 2775, 2613, 2672
Total Applications
2444
Issued Applications
1869
Pending Applications
104
Abandoned Applications
481

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19865985 [patent_doc_number] => 20250104771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/975567 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/975567
MEMORY DEVICE AND OPERATING METHOD THEREOF Dec 9, 2024 Pending
Array ( [id] => 20044612 [patent_doc_number] => 20250182834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE MULTIPLE BITS AND ASSOCIATED METHOD [patent_app_type] => utility [patent_app_number] => 18/954428 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954428 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/954428
MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE MULTIPLE BITS AND ASSOCIATED METHOD Nov 19, 2024 Pending
Array ( [id] => 20725250 [patent_doc_number] => 20260141966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-21 [patent_title] => DATA STORAGE DEVICE HAVING A MEMORY BLOCK FAILURE ANTICIPATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/954273 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/954273
DATA STORAGE DEVICE HAVING A MEMORY BLOCK FAILURE ANTICIPATION SYSTEM Nov 19, 2024 Pending
Array ( [id] => 20044586 [patent_doc_number] => 20250182808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => CONCURRENT ROW REFRESH AND ACTIVATE [patent_app_type] => utility [patent_app_number] => 18/949663 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949663 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/949663
CONCURRENT ROW REFRESH AND ACTIVATE Nov 14, 2024 Pending
Array ( [id] => 19756400 [patent_doc_number] => 20250044965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => DELAY OF INITIALIZATION AT MEMORY DIE [patent_app_type] => utility [patent_app_number] => 18/920190 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920190
DELAY OF INITIALIZATION AT MEMORY DIE Oct 17, 2024 Pending
Array ( [id] => 19757814 [patent_doc_number] => 20250046379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/920516 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920516
SEMICONDUCTOR MEMORY DEVICE Oct 17, 2024 Pending
Array ( [id] => 19712371 [patent_doc_number] => 20250022513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => EARLY DISCHARGE SEQUENCES DURING READ RECOVERY TO ALLEVIATE LATENT READ DISTURB [patent_app_type] => utility [patent_app_number] => 18/903353 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903353 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903353
EARLY DISCHARGE SEQUENCES DURING READ RECOVERY TO ALLEVIATE LATENT READ DISTURB Sep 30, 2024 Pending
Array ( [id] => 19696085 [patent_doc_number] => 20250014630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/898293 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898293
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR MEMORY APPARATUS Sep 25, 2024 Pending
Array ( [id] => 19661778 [patent_doc_number] => 20240428843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => HOST APPARATUS AND EXTENSION DEVICE [patent_app_type] => utility [patent_app_number] => 18/825362 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825362
HOST APPARATUS AND EXTENSION DEVICE Sep 4, 2024 Pending
Array ( [id] => 19646221 [patent_doc_number] => 20240420741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATURE [patent_app_type] => utility [patent_app_number] => 18/817105 [patent_app_country] => US [patent_app_date] => 2024-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/817105
VALIDATION OF DRAM CONTENT USING INTERNAL DATA SIGNATURE Aug 26, 2024 Pending
Array ( [id] => 19634356 [patent_doc_number] => 20240412805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => GLITCH DETECTION REDUNDANCY [patent_app_type] => utility [patent_app_number] => 18/808418 [patent_app_country] => US [patent_app_date] => 2024-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/808418
GLITCH DETECTION REDUNDANCY Aug 18, 2024 Pending
Array ( [id] => 20514449 [patent_doc_number] => 20260038551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => MEMORY CIRCUITS WITH WORD LINE OVERDRIVE [patent_app_type] => utility [patent_app_number] => 18/795058 [patent_app_country] => US [patent_app_date] => 2024-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18795058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/795058
MEMORY CIRCUITS WITH WORD LINE OVERDRIVE Aug 4, 2024 Pending
Array ( [id] => 19604434 [patent_doc_number] => 20240395314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/793154 [patent_app_country] => US [patent_app_date] => 2024-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18793154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/793154
APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE Aug 1, 2024 Pending
Array ( [id] => 20514477 [patent_doc_number] => 20260038579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => SENSE AMP BALANCING COMPONENT [patent_app_type] => utility [patent_app_number] => 18/788961 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18788961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/788961
SENSE AMP BALANCING COMPONENT Jul 29, 2024 Pending
Array ( [id] => 20501663 [patent_doc_number] => 20260031125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => MEMORY DEVICE DISTURBANCE MITIGATION USING EXTRA PLATE [patent_app_type] => utility [patent_app_number] => 18/786963 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786963 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786963
MEMORY DEVICE DISTURBANCE MITIGATION USING EXTRA PLATE Jul 28, 2024 Pending
Array ( [id] => 20487296 [patent_doc_number] => 20260023495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => HIGHEST DATA STATE PROGRAM-VERIFY SKIP FOR PROGRAM PERFORMANCE IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 18/776354 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/776354
HIGHEST DATA STATE PROGRAM-VERIFY SKIP FOR PROGRAM PERFORMANCE IMPROVEMENT Jul 17, 2024 Pending
Array ( [id] => 20475992 [patent_doc_number] => 20260018213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => MEMORY DEVICES, MEMORY SYSTEMS, AND OPERATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/773950 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773950
MEMORY DEVICES, MEMORY SYSTEMS, AND OPERATION METHODS THEREOF Jul 15, 2024 Pending
Array ( [id] => 19726893 [patent_doc_number] => 20250029644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/773949 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773949
MAGNETIC MEMORY DEVICE Jul 15, 2024 Pending
Array ( [id] => 19726905 [patent_doc_number] => 20250029656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MEMORY DEVICE INCLUDING VARIABLE SERIAL RESISTIVE ELEMENT HAVING VOLTAGE DIVIDING EFFECT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/774249 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774249
MEMORY DEVICE INCLUDING VARIABLE SERIAL RESISTIVE ELEMENT HAVING VOLTAGE DIVIDING EFFECT AND OPERATING METHOD THEREOF Jul 15, 2024 Pending
Array ( [id] => 19546120 [patent_doc_number] => 20240363156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/770651 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770651 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770651
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP CIRCUIT Jul 11, 2024 Pending
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