Jeffery Shawn Zweizig

Array ( [id] => 6124611 [patent_doc_number] => 20020075064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 09/849392 [patent_app_country] => US [patent_app_date] => 2001-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8323 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20020075064.pdf [firstpage_image] =>[orig_patent_app_number] => 09849392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1481523 [patent_doc_number] => 06452439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Inductive voltage spike generator with diode shunt' [patent_app_type] => B1 [patent_app_number] => 09/850353 [patent_app_country] => US [patent_app_date] => 2001-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452439.pdf [firstpage_image] =>[orig_patent_app_number] => 09850353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1472283 [patent_doc_number] => 06407618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Method and apparatus for a bias generator with output current dependent on clock frequency' [patent_app_type] => B1 [patent_app_number] => 09/851005 [patent_app_country] => US [patent_app_date] => 2001-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11773 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407618.pdf [firstpage_image] =>[orig_patent_app_number] => 09851005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6884384 [patent_doc_number] => 20010038543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Method and apparatus for a regulated power supply incluing a charge pump with sampled feedback' [patent_app_type] => new [patent_app_number] => 09/849323 [patent_app_country] => US [patent_app_date] => 2001-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2852 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038543.pdf [firstpage_image] =>[orig_patent_app_number] => 09849323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6540033 [patent_doc_number] => 20020163378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'REDUCED NOISE BAND GAP REFERENCE WITH CURRENT FEEDBACK AND METHOD OF USING' [patent_app_type] => new [patent_app_number] => 09/848198 [patent_app_country] => US [patent_app_date] => 2001-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3013 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20020163378.pdf [firstpage_image] =>[orig_patent_app_number] => 09848198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7077232 [patent_doc_number] => 20010040476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'Ciruit configuration with protection device' [patent_app_type] => new [patent_app_number] => 09/847673 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20010040476.pdf [firstpage_image] =>[orig_patent_app_number] => 09847673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1492332 [patent_doc_number] => 06417726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Semiconductor device capable of adjusting an internal power supply potential in a wide range' [patent_app_type] => B1 [patent_app_number] => 09/846196 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 8582 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417726.pdf [firstpage_image] =>[orig_patent_app_number] => 09846196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5783522 [patent_doc_number] => 20020158684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'NOISE SUPPRESSION CIRCUITRY AND METHOD' [patent_app_type] => new [patent_app_number] => 09/846523 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3150 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20020158684.pdf [firstpage_image] =>[orig_patent_app_number] => 09846523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6886017 [patent_doc_number] => 20010019286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'Booster circuit' [patent_app_type] => new [patent_app_number] => 09/842711 [patent_app_country] => US [patent_app_date] => 2001-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4016 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20010019286.pdf [firstpage_image] =>[orig_patent_app_number] => 09842711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6897695 [patent_doc_number] => 20010045860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Electronic array and methods' [patent_app_type] => new [patent_app_number] => 09/841481 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 12561 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045860.pdf [firstpage_image] =>[orig_patent_app_number] => 09841481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6881854 [patent_doc_number] => 20010048326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-06 [patent_title] => 'Circuit and method for writing to a memory disk' [patent_app_type] => new [patent_app_number] => 09/839511 [patent_app_country] => US [patent_app_date] => 2001-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6385 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20010048326.pdf [firstpage_image] =>[orig_patent_app_number] => 09839511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1597833 [patent_doc_number] => 06384644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Output circuit with switching function' [patent_app_type] => B2 [patent_app_number] => 09/828800 [patent_app_country] => US [patent_app_date] => 2001-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 11739 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384644.pdf [firstpage_image] =>[orig_patent_app_number] => 09828800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1522647 [patent_doc_number] => 06414539 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'AC timings at the input buffer of source synchronous and common clock designs by making the supply for differential amplifier track the reference voltage' [patent_app_type] => B1 [patent_app_number] => 09/819717 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1904 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414539.pdf [firstpage_image] =>[orig_patent_app_number] => 09819717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1510223 [patent_doc_number] => 06441680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'CMOS voltage reference' [patent_app_type] => B1 [patent_app_number] => 09/819801 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3199 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441680.pdf [firstpage_image] =>[orig_patent_app_number] => 09819801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6124603 [patent_doc_number] => 20020075059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'SEMICONDUCTOR INTEGRATED SWITCHING CIRCUIT' [patent_app_type] => new [patent_app_number] => 09/819761 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6093 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20020075059.pdf [firstpage_image] =>[orig_patent_app_number] => 09819761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6238408 [patent_doc_number] => 20020044008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Constant current driver circuit' [patent_app_type] => new [patent_app_number] => 09/815039 [patent_app_country] => US [patent_app_date] => 2001-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6083 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20020044008.pdf [firstpage_image] =>[orig_patent_app_number] => 09815039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1591750 [patent_doc_number] => 06483357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Semiconductor device reduced in through current' [patent_app_type] => B2 [patent_app_number] => 09/811578 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 11343 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483357.pdf [firstpage_image] =>[orig_patent_app_number] => 09811578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5840998 [patent_doc_number] => 20020130712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'SYSTEM AND METHOD UTILIZING ON-CHIP VOLTAGE MONITORING TO MANAGE POWER CONSUMPTION' [patent_app_type] => new [patent_app_number] => 09/811243 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7314 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20020130712.pdf [firstpage_image] =>[orig_patent_app_number] => 09811243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1423250 [patent_doc_number] => 06509788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-21 [patent_title] => 'System and method utilizing on-chip voltage controlled frequency modulation to manage power consumption' [patent_app_type] => B2 [patent_app_number] => 09/811255 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5348 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509788.pdf [firstpage_image] =>[orig_patent_app_number] => 09811255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1510180 [patent_doc_number] => 06441669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-27 [patent_title] => 'Internal power-source potential supply circuit, step-up potential generating system, output potential supply circuit, and semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 09/797988 [patent_app_country] => US [patent_app_date] => 2001-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 100 [patent_no_of_words] => 38898 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441669.pdf [firstpage_image] =>[orig_patent_app_number] => 09797988 [rel_patent_id] =>[rel_patent_doc_number] =>)