Search

Jeffery Shawn Zweizig

Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2849, 2842, 2504
Total Applications
2640
Issued Applications
2460
Pending Applications
67
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4403235 [patent_doc_number] => 06297673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Evaluation circuit for electronic signal transmitters' [patent_app_type] => 1 [patent_app_number] => 9/423989 [patent_app_country] => US [patent_app_date] => 1999-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1716 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297673.pdf [firstpage_image] =>[orig_patent_app_number] => 423989 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/423989
Evaluation circuit for electronic signal transmitters Nov 16, 1999 Issued
Array ( [id] => 4165558 [patent_doc_number] => 06157251 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method and apparatus for clock uncertainty minimization' [patent_app_type] => 1 [patent_app_number] => 9/439918 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3823 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157251.pdf [firstpage_image] =>[orig_patent_app_number] => 439918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439918
Method and apparatus for clock uncertainty minimization Nov 11, 1999 Issued
Array ( [id] => 4267423 [patent_doc_number] => 06204712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Method and apparatus for clock uncertainty minimization' [patent_app_type] => 1 [patent_app_number] => 9/439077 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3824 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204712.pdf [firstpage_image] =>[orig_patent_app_number] => 439077 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/439077
Method and apparatus for clock uncertainty minimization Nov 11, 1999 Issued
Array ( [id] => 4365528 [patent_doc_number] => 06169443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Transmission gate' [patent_app_type] => 1 [patent_app_number] => 9/436632 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7157 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169443.pdf [firstpage_image] =>[orig_patent_app_number] => 436632 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/436632
Transmission gate Nov 8, 1999 Issued
Array ( [id] => 4390437 [patent_doc_number] => 06278317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Charge pump system having multiple charging rates and corresponding method' [patent_app_type] => 1 [patent_app_number] => 9/430807 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4567 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278317.pdf [firstpage_image] =>[orig_patent_app_number] => 430807 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/430807
Charge pump system having multiple charging rates and corresponding method Oct 28, 1999 Issued
Array ( [id] => 4312449 [patent_doc_number] => 06326833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Highly effective charge pump employing NMOS transistors' [patent_app_type] => 1 [patent_app_number] => 9/430365 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2698 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326833.pdf [firstpage_image] =>[orig_patent_app_number] => 430365 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/430365
Highly effective charge pump employing NMOS transistors Oct 27, 1999 Issued
Array ( [id] => 4353463 [patent_doc_number] => 06285233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Low consumption electronic level shifter device' [patent_app_type] => 1 [patent_app_number] => 9/429779 [patent_app_country] => US [patent_app_date] => 1999-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2687 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285233.pdf [firstpage_image] =>[orig_patent_app_number] => 429779 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/429779
Low consumption electronic level shifter device Oct 27, 1999 Issued
Array ( [id] => 4322470 [patent_doc_number] => 06242972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Clamp circuit using PMOS-transistors with a weak temperature dependency' [patent_app_type] => 1 [patent_app_number] => 9/428291 [patent_app_country] => US [patent_app_date] => 1999-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 2657 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242972.pdf [firstpage_image] =>[orig_patent_app_number] => 428291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/428291
Clamp circuit using PMOS-transistors with a weak temperature dependency Oct 26, 1999 Issued
Array ( [id] => 4260494 [patent_doc_number] => 06208198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Drain voltage pumping circuit' [patent_app_type] => 1 [patent_app_number] => 9/428423 [patent_app_country] => US [patent_app_date] => 1999-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1952 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208198.pdf [firstpage_image] =>[orig_patent_app_number] => 428423 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/428423
Drain voltage pumping circuit Oct 26, 1999 Issued
Array ( [id] => 1588678 [patent_doc_number] => 06359502 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Semiconductor circuit having isolated oscillator' [patent_app_type] => B1 [patent_app_number] => 09/426497 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359502.pdf [firstpage_image] =>[orig_patent_app_number] => 09426497 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426497
Semiconductor circuit having isolated oscillator Oct 25, 1999 Issued
Array ( [id] => 4363353 [patent_doc_number] => 06201436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Bias current generating circuits and methods for integrated circuits including bias current generators that increase and decrease with temperature' [patent_app_type] => 1 [patent_app_number] => 9/426733 [patent_app_country] => US [patent_app_date] => 1999-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201436.pdf [firstpage_image] =>[orig_patent_app_number] => 426733 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/426733
Bias current generating circuits and methods for integrated circuits including bias current generators that increase and decrease with temperature Oct 25, 1999 Issued
Array ( [id] => 4303940 [patent_doc_number] => 06184749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Layout for pull-up/pull-down devices of off-chip driver' [patent_app_type] => 1 [patent_app_number] => 9/422022 [patent_app_country] => US [patent_app_date] => 1999-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2587 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 418 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184749.pdf [firstpage_image] =>[orig_patent_app_number] => 422022 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/422022
Layout for pull-up/pull-down devices of off-chip driver Oct 19, 1999 Issued
Array ( [id] => 4353581 [patent_doc_number] => 06285241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Internal voltage boosting circuit' [patent_app_type] => 1 [patent_app_number] => 9/421325 [patent_app_country] => US [patent_app_date] => 1999-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4561 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/285/06285241.pdf [firstpage_image] =>[orig_patent_app_number] => 421325 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/421325
Internal voltage boosting circuit Oct 17, 1999 Issued
Array ( [id] => 4367101 [patent_doc_number] => 06191627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Integrated circuit having adjustable delay units for clock signals' [patent_app_type] => 1 [patent_app_number] => 9/408685 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3409 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191627.pdf [firstpage_image] =>[orig_patent_app_number] => 408685 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408685
Integrated circuit having adjustable delay units for clock signals Sep 29, 1999 Issued
Array ( [id] => 4423957 [patent_doc_number] => 06194928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Integrated circuit with adjustable delay unit' [patent_app_type] => 1 [patent_app_number] => 9/408687 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3288 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194928.pdf [firstpage_image] =>[orig_patent_app_number] => 408687 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408687
Integrated circuit with adjustable delay unit Sep 29, 1999 Issued
Array ( [id] => 4424189 [patent_doc_number] => 06194960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Driver IC' [patent_app_type] => 1 [patent_app_number] => 9/407323 [patent_app_country] => US [patent_app_date] => 1999-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9907 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194960.pdf [firstpage_image] =>[orig_patent_app_number] => 407323 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/407323
Driver IC Sep 27, 1999 Issued
Array ( [id] => 4424045 [patent_doc_number] => 06194940 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Automatic clock switching' [patent_app_type] => 1 [patent_app_number] => 9/406533 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194940.pdf [firstpage_image] =>[orig_patent_app_number] => 406533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/406533
Automatic clock switching Sep 26, 1999 Issued
Array ( [id] => 4303502 [patent_doc_number] => 06184719 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Device for neutralizing an electronic circuit' [patent_app_type] => 1 [patent_app_number] => 9/405250 [patent_app_country] => US [patent_app_date] => 1999-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3550 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184719.pdf [firstpage_image] =>[orig_patent_app_number] => 405250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/405250
Device for neutralizing an electronic circuit Sep 23, 1999 Issued
Array ( [id] => 4424398 [patent_doc_number] => 06177821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Microcomputer with frequency multiplication circuit' [patent_app_type] => 1 [patent_app_number] => 9/404470 [patent_app_country] => US [patent_app_date] => 1999-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6093 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177821.pdf [firstpage_image] =>[orig_patent_app_number] => 404470 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/404470
Microcomputer with frequency multiplication circuit Sep 23, 1999 Issued
Array ( [id] => 4302650 [patent_doc_number] => 06181174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/404221 [patent_app_country] => US [patent_app_date] => 1999-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 43 [patent_no_of_words] => 16665 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181174.pdf [firstpage_image] =>[orig_patent_app_number] => 404221 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/404221
Semiconductor integrated circuit device Sep 22, 1999 Issued
Menu